e2b67a868b
Hardware S2R special registers match gl_Thread*MaskNV. We can trivially implement these using Nvidia's extension on OpenGL or naively stubbing them with the ARB instructions to match. This might cause issues if the host device warp size doesn't match Nvidia's. That said, this is unlikely on proper shaders. Refer to the attached url for more documentation about these flags. https://www.khronos.org/registry/OpenGL/extensions/NV/NV_shader_thread_group.txt
710 lines
23 KiB
C++
710 lines
23 KiB
C++
// Copyright 2019 yuzu Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#pragma once
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#include <array>
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#include <cstddef>
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#include <memory>
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#include <optional>
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#include <string>
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#include <tuple>
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#include <utility>
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#include <variant>
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#include <vector>
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#include "common/common_types.h"
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#include "video_core/engines/shader_bytecode.h"
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namespace VideoCommon::Shader {
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enum class OperationCode {
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Assign, /// (float& dest, float src) -> void
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Select, /// (MetaArithmetic, bool pred, float a, float b) -> float
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FAdd, /// (MetaArithmetic, float a, float b) -> float
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FMul, /// (MetaArithmetic, float a, float b) -> float
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FDiv, /// (MetaArithmetic, float a, float b) -> float
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FFma, /// (MetaArithmetic, float a, float b, float c) -> float
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FNegate, /// (MetaArithmetic, float a) -> float
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FAbsolute, /// (MetaArithmetic, float a) -> float
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FClamp, /// (MetaArithmetic, float value, float min, float max) -> float
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FCastHalf0, /// (MetaArithmetic, f16vec2 a) -> float
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FCastHalf1, /// (MetaArithmetic, f16vec2 a) -> float
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FMin, /// (MetaArithmetic, float a, float b) -> float
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FMax, /// (MetaArithmetic, float a, float b) -> float
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FCos, /// (MetaArithmetic, float a) -> float
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FSin, /// (MetaArithmetic, float a) -> float
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FExp2, /// (MetaArithmetic, float a) -> float
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FLog2, /// (MetaArithmetic, float a) -> float
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FInverseSqrt, /// (MetaArithmetic, float a) -> float
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FSqrt, /// (MetaArithmetic, float a) -> float
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FRoundEven, /// (MetaArithmetic, float a) -> float
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FFloor, /// (MetaArithmetic, float a) -> float
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FCeil, /// (MetaArithmetic, float a) -> float
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FTrunc, /// (MetaArithmetic, float a) -> float
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FCastInteger, /// (MetaArithmetic, int a) -> float
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FCastUInteger, /// (MetaArithmetic, uint a) -> float
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FSwizzleAdd, /// (float a, float b, uint mask) -> float
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IAdd, /// (MetaArithmetic, int a, int b) -> int
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IMul, /// (MetaArithmetic, int a, int b) -> int
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IDiv, /// (MetaArithmetic, int a, int b) -> int
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INegate, /// (MetaArithmetic, int a) -> int
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IAbsolute, /// (MetaArithmetic, int a) -> int
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IMin, /// (MetaArithmetic, int a, int b) -> int
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IMax, /// (MetaArithmetic, int a, int b) -> int
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ICastFloat, /// (MetaArithmetic, float a) -> int
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ICastUnsigned, /// (MetaArithmetic, uint a) -> int
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ILogicalShiftLeft, /// (MetaArithmetic, int a, uint b) -> int
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ILogicalShiftRight, /// (MetaArithmetic, int a, uint b) -> int
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IArithmeticShiftRight, /// (MetaArithmetic, int a, uint b) -> int
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IBitwiseAnd, /// (MetaArithmetic, int a, int b) -> int
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IBitwiseOr, /// (MetaArithmetic, int a, int b) -> int
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IBitwiseXor, /// (MetaArithmetic, int a, int b) -> int
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IBitwiseNot, /// (MetaArithmetic, int a) -> int
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IBitfieldInsert, /// (MetaArithmetic, int base, int insert, int offset, int bits) -> int
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IBitfieldExtract, /// (MetaArithmetic, int value, int offset, int offset) -> int
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IBitCount, /// (MetaArithmetic, int) -> int
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IBitMSB, /// (MetaArithmetic, int) -> int
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UAdd, /// (MetaArithmetic, uint a, uint b) -> uint
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UMul, /// (MetaArithmetic, uint a, uint b) -> uint
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UDiv, /// (MetaArithmetic, uint a, uint b) -> uint
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UMin, /// (MetaArithmetic, uint a, uint b) -> uint
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UMax, /// (MetaArithmetic, uint a, uint b) -> uint
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UCastFloat, /// (MetaArithmetic, float a) -> uint
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UCastSigned, /// (MetaArithmetic, int a) -> uint
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ULogicalShiftLeft, /// (MetaArithmetic, uint a, uint b) -> uint
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ULogicalShiftRight, /// (MetaArithmetic, uint a, uint b) -> uint
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UArithmeticShiftRight, /// (MetaArithmetic, uint a, uint b) -> uint
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UBitwiseAnd, /// (MetaArithmetic, uint a, uint b) -> uint
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UBitwiseOr, /// (MetaArithmetic, uint a, uint b) -> uint
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UBitwiseXor, /// (MetaArithmetic, uint a, uint b) -> uint
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UBitwiseNot, /// (MetaArithmetic, uint a) -> uint
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UBitfieldInsert, /// (MetaArithmetic, uint base, uint insert, int offset, int bits) -> uint
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UBitfieldExtract, /// (MetaArithmetic, uint value, int offset, int offset) -> uint
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UBitCount, /// (MetaArithmetic, uint) -> uint
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UBitMSB, /// (MetaArithmetic, uint) -> uint
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HAdd, /// (MetaArithmetic, f16vec2 a, f16vec2 b) -> f16vec2
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HMul, /// (MetaArithmetic, f16vec2 a, f16vec2 b) -> f16vec2
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HFma, /// (MetaArithmetic, f16vec2 a, f16vec2 b, f16vec2 c) -> f16vec2
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HAbsolute, /// (f16vec2 a) -> f16vec2
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HNegate, /// (f16vec2 a, bool first, bool second) -> f16vec2
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HClamp, /// (f16vec2 src, float min, float max) -> f16vec2
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HCastFloat, /// (MetaArithmetic, float a) -> f16vec2
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HUnpack, /// (Tegra::Shader::HalfType, T value) -> f16vec2
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HMergeF32, /// (f16vec2 src) -> float
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HMergeH0, /// (f16vec2 dest, f16vec2 src) -> f16vec2
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HMergeH1, /// (f16vec2 dest, f16vec2 src) -> f16vec2
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HPack2, /// (float a, float b) -> f16vec2
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LogicalAssign, /// (bool& dst, bool src) -> void
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LogicalAnd, /// (bool a, bool b) -> bool
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LogicalOr, /// (bool a, bool b) -> bool
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LogicalXor, /// (bool a, bool b) -> bool
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LogicalNegate, /// (bool a) -> bool
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LogicalPick2, /// (bool2 pair, uint index) -> bool
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LogicalAnd2, /// (bool2 a) -> bool
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LogicalFOrdLessThan, /// (float a, float b) -> bool
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LogicalFOrdEqual, /// (float a, float b) -> bool
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LogicalFOrdLessEqual, /// (float a, float b) -> bool
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LogicalFOrdGreaterThan, /// (float a, float b) -> bool
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LogicalFOrdNotEqual, /// (float a, float b) -> bool
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LogicalFOrdGreaterEqual, /// (float a, float b) -> bool
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LogicalFOrdered, /// (float a, float b) -> bool
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LogicalFUnordered, /// (float a, float b) -> bool
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LogicalFUnordLessThan, /// (float a, float b) -> bool
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LogicalFUnordEqual, /// (float a, float b) -> bool
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LogicalFUnordLessEqual, /// (float a, float b) -> bool
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LogicalFUnordGreaterThan, /// (float a, float b) -> bool
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LogicalFUnordNotEqual, /// (float a, float b) -> bool
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LogicalFUnordGreaterEqual, /// (float a, float b) -> bool
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LogicalILessThan, /// (int a, int b) -> bool
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LogicalIEqual, /// (int a, int b) -> bool
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LogicalILessEqual, /// (int a, int b) -> bool
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LogicalIGreaterThan, /// (int a, int b) -> bool
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LogicalINotEqual, /// (int a, int b) -> bool
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LogicalIGreaterEqual, /// (int a, int b) -> bool
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LogicalULessThan, /// (uint a, uint b) -> bool
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LogicalUEqual, /// (uint a, uint b) -> bool
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LogicalULessEqual, /// (uint a, uint b) -> bool
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LogicalUGreaterThan, /// (uint a, uint b) -> bool
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LogicalUNotEqual, /// (uint a, uint b) -> bool
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LogicalUGreaterEqual, /// (uint a, uint b) -> bool
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LogicalAddCarry, /// (uint a, uint b) -> bool
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Logical2HLessThan, /// (MetaHalfArithmetic, f16vec2 a, f16vec2) -> bool2
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Logical2HEqual, /// (MetaHalfArithmetic, f16vec2 a, f16vec2) -> bool2
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Logical2HLessEqual, /// (MetaHalfArithmetic, f16vec2 a, f16vec2) -> bool2
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Logical2HGreaterThan, /// (MetaHalfArithmetic, f16vec2 a, f16vec2) -> bool2
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Logical2HNotEqual, /// (MetaHalfArithmetic, f16vec2 a, f16vec2) -> bool2
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Logical2HGreaterEqual, /// (MetaHalfArithmetic, f16vec2 a, f16vec2) -> bool2
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Logical2HLessThanWithNan, /// (MetaHalfArithmetic, f16vec2 a, f16vec2) -> bool2
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Logical2HEqualWithNan, /// (MetaHalfArithmetic, f16vec2 a, f16vec2) -> bool2
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Logical2HLessEqualWithNan, /// (MetaHalfArithmetic, f16vec2 a, f16vec2) -> bool2
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Logical2HGreaterThanWithNan, /// (MetaHalfArithmetic, f16vec2 a, f16vec2) -> bool2
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Logical2HNotEqualWithNan, /// (MetaHalfArithmetic, f16vec2 a, f16vec2) -> bool2
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Logical2HGreaterEqualWithNan, /// (MetaHalfArithmetic, f16vec2 a, f16vec2) -> bool2
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Texture, /// (MetaTexture, float[N] coords) -> float4
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TextureLod, /// (MetaTexture, float[N] coords) -> float4
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TextureGather, /// (MetaTexture, float[N] coords) -> float4
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TextureQueryDimensions, /// (MetaTexture, float a) -> float4
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TextureQueryLod, /// (MetaTexture, float[N] coords) -> float4
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TexelFetch, /// (MetaTexture, int[N], int) -> float4
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TextureGradient, /// (MetaTexture, float[N] coords, float[N*2] derivates) -> float4
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ImageLoad, /// (MetaImage, int[N] coords) -> void
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ImageStore, /// (MetaImage, int[N] coords) -> void
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AtomicImageAdd, /// (MetaImage, int[N] coords) -> void
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AtomicImageAnd, /// (MetaImage, int[N] coords) -> void
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AtomicImageOr, /// (MetaImage, int[N] coords) -> void
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AtomicImageXor, /// (MetaImage, int[N] coords) -> void
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AtomicImageExchange, /// (MetaImage, int[N] coords) -> void
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AtomicUExchange, /// (memory, uint) -> uint
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AtomicUAdd, /// (memory, uint) -> uint
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AtomicUMin, /// (memory, uint) -> uint
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AtomicUMax, /// (memory, uint) -> uint
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AtomicUAnd, /// (memory, uint) -> uint
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AtomicUOr, /// (memory, uint) -> uint
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AtomicUXor, /// (memory, uint) -> uint
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AtomicIExchange, /// (memory, int) -> int
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AtomicIAdd, /// (memory, int) -> int
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AtomicIMin, /// (memory, int) -> int
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AtomicIMax, /// (memory, int) -> int
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AtomicIAnd, /// (memory, int) -> int
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AtomicIOr, /// (memory, int) -> int
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AtomicIXor, /// (memory, int) -> int
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ReduceUAdd, /// (memory, uint) -> void
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ReduceUMin, /// (memory, uint) -> void
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ReduceUMax, /// (memory, uint) -> void
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ReduceUAnd, /// (memory, uint) -> void
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ReduceUOr, /// (memory, uint) -> void
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ReduceUXor, /// (memory, uint) -> void
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ReduceIAdd, /// (memory, int) -> void
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ReduceIMin, /// (memory, int) -> void
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ReduceIMax, /// (memory, int) -> void
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ReduceIAnd, /// (memory, int) -> void
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ReduceIOr, /// (memory, int) -> void
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ReduceIXor, /// (memory, int) -> void
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Branch, /// (uint branch_target) -> void
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BranchIndirect, /// (uint branch_target) -> void
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PushFlowStack, /// (uint branch_target) -> void
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PopFlowStack, /// () -> void
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Exit, /// () -> void
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Discard, /// () -> void
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EmitVertex, /// () -> void
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EndPrimitive, /// () -> void
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InvocationId, /// () -> int
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YNegate, /// () -> float
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LocalInvocationIdX, /// () -> uint
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LocalInvocationIdY, /// () -> uint
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LocalInvocationIdZ, /// () -> uint
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WorkGroupIdX, /// () -> uint
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WorkGroupIdY, /// () -> uint
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WorkGroupIdZ, /// () -> uint
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BallotThread, /// (bool) -> uint
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VoteAll, /// (bool) -> bool
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VoteAny, /// (bool) -> bool
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VoteEqual, /// (bool) -> bool
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ThreadId, /// () -> uint
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ThreadEqMask, /// () -> uint
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ThreadGeMask, /// () -> uint
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ThreadGtMask, /// () -> uint
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ThreadLeMask, /// () -> uint
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ThreadLtMask, /// () -> uint
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ShuffleIndexed, /// (uint value, uint index) -> uint
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MemoryBarrierGL, /// () -> void
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Amount,
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};
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enum class InternalFlag {
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Zero = 0,
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Sign = 1,
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Carry = 2,
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Overflow = 3,
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Amount = 4,
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};
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enum class MetaStackClass {
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Ssy,
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Pbk,
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};
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class OperationNode;
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class ConditionalNode;
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class GprNode;
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class CustomVarNode;
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class ImmediateNode;
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class InternalFlagNode;
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class PredicateNode;
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class AbufNode;
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class CbufNode;
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class LmemNode;
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class PatchNode;
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class SmemNode;
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class GmemNode;
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class CommentNode;
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using NodeData = std::variant<OperationNode, ConditionalNode, GprNode, CustomVarNode, ImmediateNode,
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InternalFlagNode, PredicateNode, AbufNode, PatchNode, CbufNode,
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LmemNode, SmemNode, GmemNode, CommentNode>;
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using Node = std::shared_ptr<NodeData>;
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using Node4 = std::array<Node, 4>;
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using NodeBlock = std::vector<Node>;
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class BindlessSamplerNode;
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class ArraySamplerNode;
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using TrackSamplerData = std::variant<BindlessSamplerNode, ArraySamplerNode>;
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using TrackSampler = std::shared_ptr<TrackSamplerData>;
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struct Sampler {
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/// Bound samplers constructor
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constexpr explicit Sampler(u32 index, u32 offset, Tegra::Shader::TextureType type,
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bool is_array, bool is_shadow, bool is_buffer, bool is_indexed)
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: index{index}, offset{offset}, type{type}, is_array{is_array}, is_shadow{is_shadow},
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is_buffer{is_buffer}, is_indexed{is_indexed} {}
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/// Bindless samplers constructor
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constexpr explicit Sampler(u32 index, u32 offset, u32 buffer, Tegra::Shader::TextureType type,
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bool is_array, bool is_shadow, bool is_buffer, bool is_indexed)
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: index{index}, offset{offset}, buffer{buffer}, type{type}, is_array{is_array},
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is_shadow{is_shadow}, is_buffer{is_buffer}, is_bindless{true}, is_indexed{is_indexed} {}
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u32 index = 0; ///< Emulated index given for the this sampler.
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u32 offset = 0; ///< Offset in the const buffer from where the sampler is being read.
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u32 buffer = 0; ///< Buffer where the bindless sampler is being read (unused on bound samplers).
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u32 size = 1; ///< Size of the sampler.
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Tegra::Shader::TextureType type{}; ///< The type used to sample this texture (Texture2D, etc)
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bool is_array = false; ///< Whether the texture is being sampled as an array texture or not.
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bool is_shadow = false; ///< Whether the texture is being sampled as a depth texture or not.
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bool is_buffer = false; ///< Whether the texture is a texture buffer without sampler.
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bool is_bindless = false; ///< Whether this sampler belongs to a bindless texture or not.
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bool is_indexed = false; ///< Whether this sampler is an indexed array of textures.
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};
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/// Represents a tracked bindless sampler into a direct const buffer
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class ArraySamplerNode final {
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public:
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explicit ArraySamplerNode(u32 index, u32 base_offset, u32 bindless_var)
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: index{index}, base_offset{base_offset}, bindless_var{bindless_var} {}
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constexpr u32 GetIndex() const {
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return index;
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}
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constexpr u32 GetBaseOffset() const {
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return base_offset;
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}
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constexpr u32 GetIndexVar() const {
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return bindless_var;
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}
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private:
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u32 index;
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u32 base_offset;
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u32 bindless_var;
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};
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/// Represents a tracked bindless sampler into a direct const buffer
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class BindlessSamplerNode final {
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public:
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explicit BindlessSamplerNode(u32 index, u32 offset) : index{index}, offset{offset} {}
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constexpr u32 GetIndex() const {
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return index;
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}
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constexpr u32 GetOffset() const {
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return offset;
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}
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private:
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u32 index;
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u32 offset;
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};
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struct Image {
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public:
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/// Bound images constructor
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constexpr explicit Image(u32 index, u32 offset, Tegra::Shader::ImageType type)
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: index{index}, offset{offset}, type{type} {}
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/// Bindless samplers constructor
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constexpr explicit Image(u32 index, u32 offset, u32 buffer, Tegra::Shader::ImageType type)
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: index{index}, offset{offset}, buffer{buffer}, type{type}, is_bindless{true} {}
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void MarkWrite() {
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is_written = true;
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}
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void MarkRead() {
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is_read = true;
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}
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void MarkAtomic() {
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MarkWrite();
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MarkRead();
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is_atomic = true;
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}
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u32 index = 0;
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u32 offset = 0;
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u32 buffer = 0;
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Tegra::Shader::ImageType type{};
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bool is_bindless = false;
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bool is_written = false;
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bool is_read = false;
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bool is_atomic = false;
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};
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struct GlobalMemoryBase {
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u32 cbuf_index = 0;
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u32 cbuf_offset = 0;
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bool operator<(const GlobalMemoryBase& rhs) const {
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return std::tie(cbuf_index, cbuf_offset) < std::tie(rhs.cbuf_index, rhs.cbuf_offset);
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}
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};
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/// Parameters describing an arithmetic operation
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struct MetaArithmetic {
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bool precise{}; ///< Whether the operation can be constraint or not
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};
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/// Parameters describing a texture sampler
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struct MetaTexture {
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Sampler sampler;
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Node array;
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Node depth_compare;
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std::vector<Node> aoffi;
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std::vector<Node> ptp;
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std::vector<Node> derivates;
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Node bias;
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Node lod;
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Node component;
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u32 element{};
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Node index;
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};
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struct MetaImage {
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const Image& image;
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std::vector<Node> values;
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u32 element{};
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};
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/// Parameters that modify an operation but are not part of any particular operand
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using Meta =
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std::variant<MetaArithmetic, MetaTexture, MetaImage, MetaStackClass, Tegra::Shader::HalfType>;
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class AmendNode {
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public:
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std::optional<std::size_t> GetAmendIndex() const {
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if (amend_index == amend_null_index) {
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return std::nullopt;
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}
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return {amend_index};
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}
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void SetAmendIndex(std::size_t index) {
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amend_index = index;
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}
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|
|
void ClearAmend() {
|
|
amend_index = amend_null_index;
|
|
}
|
|
|
|
private:
|
|
static constexpr std::size_t amend_null_index = 0xFFFFFFFFFFFFFFFFULL;
|
|
std::size_t amend_index{amend_null_index};
|
|
};
|
|
|
|
/// Holds any kind of operation that can be done in the IR
|
|
class OperationNode final : public AmendNode {
|
|
public:
|
|
explicit OperationNode(OperationCode code) : OperationNode(code, Meta{}) {}
|
|
|
|
explicit OperationNode(OperationCode code, Meta meta)
|
|
: OperationNode(code, std::move(meta), std::vector<Node>{}) {}
|
|
|
|
explicit OperationNode(OperationCode code, std::vector<Node> operands)
|
|
: OperationNode(code, Meta{}, std::move(operands)) {}
|
|
|
|
explicit OperationNode(OperationCode code, Meta meta, std::vector<Node> operands)
|
|
: code{code}, meta{std::move(meta)}, operands{std::move(operands)} {}
|
|
|
|
template <typename... Args>
|
|
explicit OperationNode(OperationCode code, Meta meta, Args&&... operands)
|
|
: code{code}, meta{std::move(meta)}, operands{operands...} {}
|
|
|
|
OperationCode GetCode() const {
|
|
return code;
|
|
}
|
|
|
|
const Meta& GetMeta() const {
|
|
return meta;
|
|
}
|
|
|
|
std::size_t GetOperandsCount() const {
|
|
return operands.size();
|
|
}
|
|
|
|
const Node& operator[](std::size_t operand_index) const {
|
|
return operands.at(operand_index);
|
|
}
|
|
|
|
private:
|
|
OperationCode code{};
|
|
Meta meta{};
|
|
std::vector<Node> operands;
|
|
};
|
|
|
|
/// Encloses inside any kind of node that returns a boolean conditionally-executed code
|
|
class ConditionalNode final : public AmendNode {
|
|
public:
|
|
explicit ConditionalNode(Node condition, std::vector<Node>&& code)
|
|
: condition{std::move(condition)}, code{std::move(code)} {}
|
|
|
|
const Node& GetCondition() const {
|
|
return condition;
|
|
}
|
|
|
|
const std::vector<Node>& GetCode() const {
|
|
return code;
|
|
}
|
|
|
|
private:
|
|
Node condition; ///< Condition to be satisfied
|
|
std::vector<Node> code; ///< Code to execute
|
|
};
|
|
|
|
/// A general purpose register
|
|
class GprNode final {
|
|
public:
|
|
explicit constexpr GprNode(Tegra::Shader::Register index) : index{index} {}
|
|
|
|
u32 GetIndex() const {
|
|
return static_cast<u32>(index);
|
|
}
|
|
|
|
private:
|
|
Tegra::Shader::Register index{};
|
|
};
|
|
|
|
/// A custom variable
|
|
class CustomVarNode final {
|
|
public:
|
|
explicit constexpr CustomVarNode(u32 index) : index{index} {}
|
|
|
|
constexpr u32 GetIndex() const {
|
|
return index;
|
|
}
|
|
|
|
private:
|
|
u32 index{};
|
|
};
|
|
|
|
/// A 32-bits value that represents an immediate value
|
|
class ImmediateNode final {
|
|
public:
|
|
explicit constexpr ImmediateNode(u32 value) : value{value} {}
|
|
|
|
u32 GetValue() const {
|
|
return value;
|
|
}
|
|
|
|
private:
|
|
u32 value{};
|
|
};
|
|
|
|
/// One of Maxwell's internal flags
|
|
class InternalFlagNode final {
|
|
public:
|
|
explicit constexpr InternalFlagNode(InternalFlag flag) : flag{flag} {}
|
|
|
|
InternalFlag GetFlag() const {
|
|
return flag;
|
|
}
|
|
|
|
private:
|
|
InternalFlag flag{};
|
|
};
|
|
|
|
/// A predicate register, it can be negated without additional nodes
|
|
class PredicateNode final {
|
|
public:
|
|
explicit constexpr PredicateNode(Tegra::Shader::Pred index, bool negated)
|
|
: index{index}, negated{negated} {}
|
|
|
|
Tegra::Shader::Pred GetIndex() const {
|
|
return index;
|
|
}
|
|
|
|
bool IsNegated() const {
|
|
return negated;
|
|
}
|
|
|
|
private:
|
|
Tegra::Shader::Pred index{};
|
|
bool negated{};
|
|
};
|
|
|
|
/// Attribute buffer memory (known as attributes or varyings in GLSL terms)
|
|
class AbufNode final {
|
|
public:
|
|
// Initialize for standard attributes (index is explicit).
|
|
explicit AbufNode(Tegra::Shader::Attribute::Index index, u32 element, Node buffer = {})
|
|
: buffer{std::move(buffer)}, index{index}, element{element} {}
|
|
|
|
// Initialize for physical attributes (index is a variable value).
|
|
explicit AbufNode(Node physical_address, Node buffer = {})
|
|
: physical_address{std::move(physical_address)}, buffer{std::move(buffer)} {}
|
|
|
|
Tegra::Shader::Attribute::Index GetIndex() const {
|
|
return index;
|
|
}
|
|
|
|
u32 GetElement() const {
|
|
return element;
|
|
}
|
|
|
|
const Node& GetBuffer() const {
|
|
return buffer;
|
|
}
|
|
|
|
bool IsPhysicalBuffer() const {
|
|
return static_cast<bool>(physical_address);
|
|
}
|
|
|
|
const Node& GetPhysicalAddress() const {
|
|
return physical_address;
|
|
}
|
|
|
|
private:
|
|
Node physical_address;
|
|
Node buffer;
|
|
Tegra::Shader::Attribute::Index index{};
|
|
u32 element{};
|
|
};
|
|
|
|
/// Patch memory (used to communicate tessellation stages).
|
|
class PatchNode final {
|
|
public:
|
|
explicit PatchNode(u32 offset) : offset{offset} {}
|
|
|
|
u32 GetOffset() const {
|
|
return offset;
|
|
}
|
|
|
|
private:
|
|
u32 offset{};
|
|
};
|
|
|
|
/// Constant buffer node, usually mapped to uniform buffers in GLSL
|
|
class CbufNode final {
|
|
public:
|
|
explicit CbufNode(u32 index, Node offset) : index{index}, offset{std::move(offset)} {}
|
|
|
|
u32 GetIndex() const {
|
|
return index;
|
|
}
|
|
|
|
const Node& GetOffset() const {
|
|
return offset;
|
|
}
|
|
|
|
private:
|
|
u32 index{};
|
|
Node offset;
|
|
};
|
|
|
|
/// Local memory node
|
|
class LmemNode final {
|
|
public:
|
|
explicit LmemNode(Node address) : address{std::move(address)} {}
|
|
|
|
const Node& GetAddress() const {
|
|
return address;
|
|
}
|
|
|
|
private:
|
|
Node address;
|
|
};
|
|
|
|
/// Shared memory node
|
|
class SmemNode final {
|
|
public:
|
|
explicit SmemNode(Node address) : address{std::move(address)} {}
|
|
|
|
const Node& GetAddress() const {
|
|
return address;
|
|
}
|
|
|
|
private:
|
|
Node address;
|
|
};
|
|
|
|
/// Global memory node
|
|
class GmemNode final {
|
|
public:
|
|
explicit GmemNode(Node real_address, Node base_address, const GlobalMemoryBase& descriptor)
|
|
: real_address{std::move(real_address)}, base_address{std::move(base_address)},
|
|
descriptor{descriptor} {}
|
|
|
|
const Node& GetRealAddress() const {
|
|
return real_address;
|
|
}
|
|
|
|
const Node& GetBaseAddress() const {
|
|
return base_address;
|
|
}
|
|
|
|
const GlobalMemoryBase& GetDescriptor() const {
|
|
return descriptor;
|
|
}
|
|
|
|
private:
|
|
Node real_address;
|
|
Node base_address;
|
|
GlobalMemoryBase descriptor;
|
|
};
|
|
|
|
/// Commentary, can be dropped
|
|
class CommentNode final {
|
|
public:
|
|
explicit CommentNode(std::string text) : text{std::move(text)} {}
|
|
|
|
const std::string& GetText() const {
|
|
return text;
|
|
}
|
|
|
|
private:
|
|
std::string text;
|
|
};
|
|
|
|
} // namespace VideoCommon::Shader
|