99ceb03a1c
This formats all copyright comments according to SPDX formatting guidelines. Additionally, this resolves the remaining GPLv2 only licensed files by relicensing them to GPLv2.0-or-later.
77 lines
3.2 KiB
C++
77 lines
3.2 KiB
C++
// SPDX-FileCopyrightText: Copyright 2021 yuzu Emulator Project
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// SPDX-License-Identifier: GPL-2.0-or-later
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#include "shader_recompiler/backend/glsl/emit_glsl_instructions.h"
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#include "shader_recompiler/backend/glsl/glsl_emit_context.h"
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#include "shader_recompiler/frontend/ir/value.h"
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namespace Shader::Backend::GLSL {
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namespace {
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constexpr char cas_loop[]{"for(;;){{uint old_value={};uint "
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"cas_result=atomicCompSwap({},old_value,bitfieldInsert({},{},{},{}));"
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"if(cas_result==old_value){{break;}}}}"};
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void SharedWriteCas(EmitContext& ctx, std::string_view offset, std::string_view value,
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std::string_view bit_offset, u32 num_bits) {
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const auto smem{fmt::format("smem[{}>>2]", offset)};
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ctx.Add(cas_loop, smem, smem, smem, value, bit_offset, num_bits);
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}
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} // Anonymous namespace
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void EmitLoadSharedU8(EmitContext& ctx, IR::Inst& inst, std::string_view offset) {
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ctx.AddU32("{}=bitfieldExtract(smem[{}>>2],int({}%4)*8,8);", inst, offset, offset);
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}
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void EmitLoadSharedS8(EmitContext& ctx, IR::Inst& inst, std::string_view offset) {
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ctx.AddU32("{}=bitfieldExtract(int(smem[{}>>2]),int({}%4)*8,8);", inst, offset, offset);
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}
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void EmitLoadSharedU16(EmitContext& ctx, IR::Inst& inst, std::string_view offset) {
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ctx.AddU32("{}=bitfieldExtract(smem[{}>>2],int(({}>>1)%2)*16,16);", inst, offset, offset);
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}
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void EmitLoadSharedS16(EmitContext& ctx, IR::Inst& inst, std::string_view offset) {
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ctx.AddU32("{}=bitfieldExtract(int(smem[{}>>2]),int(({}>>1)%2)*16,16);", inst, offset, offset);
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}
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void EmitLoadSharedU32(EmitContext& ctx, IR::Inst& inst, std::string_view offset) {
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ctx.AddU32("{}=smem[{}>>2];", inst, offset);
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}
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void EmitLoadSharedU64(EmitContext& ctx, IR::Inst& inst, std::string_view offset) {
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ctx.AddU32x2("{}=uvec2(smem[{}>>2],smem[({}+4)>>2]);", inst, offset, offset);
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}
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void EmitLoadSharedU128(EmitContext& ctx, IR::Inst& inst, std::string_view offset) {
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ctx.AddU32x4("{}=uvec4(smem[{}>>2],smem[({}+4)>>2],smem[({}+8)>>2],smem[({}+12)>>2]);", inst,
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offset, offset, offset, offset);
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}
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void EmitWriteSharedU8(EmitContext& ctx, std::string_view offset, std::string_view value) {
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const auto bit_offset{fmt::format("int({}%4)*8", offset)};
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SharedWriteCas(ctx, offset, value, bit_offset, 8);
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}
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void EmitWriteSharedU16(EmitContext& ctx, std::string_view offset, std::string_view value) {
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const auto bit_offset{fmt::format("int(({}>>1)%2)*16", offset)};
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SharedWriteCas(ctx, offset, value, bit_offset, 16);
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}
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void EmitWriteSharedU32(EmitContext& ctx, std::string_view offset, std::string_view value) {
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ctx.Add("smem[{}>>2]={};", offset, value);
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}
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void EmitWriteSharedU64(EmitContext& ctx, std::string_view offset, std::string_view value) {
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ctx.Add("smem[{}>>2]={}.x;", offset, value);
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ctx.Add("smem[({}+4)>>2]={}.y;", offset, value);
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}
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void EmitWriteSharedU128(EmitContext& ctx, std::string_view offset, std::string_view value) {
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ctx.Add("smem[{}>>2]={}.x;", offset, value);
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ctx.Add("smem[({}+4)>>2]={}.y;", offset, value);
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ctx.Add("smem[({}+8)>>2]={}.z;", offset, value);
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ctx.Add("smem[({}+12)>>2]={}.w;", offset, value);
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}
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} // namespace Shader::Backend::GLSL
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