142 lines
3.6 KiB
C++
142 lines
3.6 KiB
C++
// Copyright 2021 yuzu Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#include <string>
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#include <fmt/format.h>
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#include "shader_recompiler/backend/glasm/emit_context.h"
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#include "shader_recompiler/backend/glasm/reg_alloc.h"
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#include "shader_recompiler/exception.h"
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#include "shader_recompiler/frontend/ir/value.h"
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namespace Shader::Backend::GLASM {
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Register RegAlloc::Define(IR::Inst& inst) {
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return Define(inst, false);
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}
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Register RegAlloc::LongDefine(IR::Inst& inst) {
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return Define(inst, true);
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}
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Value RegAlloc::Peek(const IR::Value& value) {
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return value.IsImmediate() ? MakeImm(value) : PeekInst(*value.InstRecursive());
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}
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Value RegAlloc::Consume(const IR::Value& value) {
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return value.IsImmediate() ? MakeImm(value) : ConsumeInst(*value.InstRecursive());
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}
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void RegAlloc::Unref(IR::Inst& inst) {
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inst.DestructiveRemoveUsage();
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if (!inst.HasUses()) {
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Free(inst.Definition<Id>());
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}
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}
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Register RegAlloc::AllocReg() {
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Register ret;
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ret.type = Type::Register;
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ret.id = Alloc(false);
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return ret;
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}
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Register RegAlloc::AllocLongReg() {
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Register ret;
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ret.type = Type::Register;
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ret.id = Alloc(true);
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return ret;
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}
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void RegAlloc::FreeReg(Register reg) {
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Free(reg.id);
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}
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Value RegAlloc::MakeImm(const IR::Value& value) {
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Value ret;
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switch (value.Type()) {
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case IR::Type::Void:
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ret.type = Type::Void;
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break;
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case IR::Type::U1:
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ret.type = Type::U32;
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ret.imm_u32 = value.U1() ? 0xffffffff : 0;
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break;
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case IR::Type::U32:
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ret.type = Type::U32;
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ret.imm_u32 = value.U32();
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break;
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case IR::Type::F32:
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ret.type = Type::F32;
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ret.imm_f32 = value.F32();
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break;
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case IR::Type::U64:
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ret.type = Type::U64;
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ret.imm_u64 = value.U64();
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break;
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case IR::Type::F64:
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ret.type = Type::F64;
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ret.imm_f64 = value.F64();
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break;
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default:
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throw NotImplementedException("Immediate type {}", value.Type());
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}
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return ret;
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}
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Register RegAlloc::Define(IR::Inst& inst, bool is_long) {
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inst.SetDefinition<Id>(Alloc(is_long));
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return Register{PeekInst(inst)};
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}
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Value RegAlloc::PeekInst(IR::Inst& inst) {
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Value ret;
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ret.type = Type::Register;
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ret.id = inst.Definition<Id>();
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return ret;
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}
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Value RegAlloc::ConsumeInst(IR::Inst& inst) {
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inst.DestructiveRemoveUsage();
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if (!inst.HasUses()) {
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Free(inst.Definition<Id>());
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}
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return PeekInst(inst);
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}
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Id RegAlloc::Alloc(bool is_long) {
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size_t& num_regs{is_long ? num_used_long_registers : num_used_registers};
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std::bitset<NUM_REGS>& use{is_long ? long_register_use : register_use};
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if (num_used_registers + num_used_long_registers < NUM_REGS) {
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for (size_t reg = 0; reg < NUM_REGS; ++reg) {
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if (use[reg]) {
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continue;
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}
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num_regs = std::max(num_regs, reg + 1);
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use[reg] = true;
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Id ret{};
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ret.index.Assign(static_cast<u32>(reg));
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ret.is_long.Assign(is_long ? 1 : 0);
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ret.is_spill.Assign(0);
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ret.is_condition_code.Assign(0);
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return ret;
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}
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}
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throw NotImplementedException("Register spilling");
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}
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void RegAlloc::Free(Id id) {
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if (id.is_spill != 0) {
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throw NotImplementedException("Free spill");
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}
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if (id.is_long != 0) {
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long_register_use[id.index] = false;
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} else {
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register_use[id.index] = false;
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}
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}
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} // namespace Shader::Backend::GLASM
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