412 lines
14 KiB
C++
412 lines
14 KiB
C++
// SPDX-FileCopyrightText: Copyright 2021 yuzu Emulator Project
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// SPDX-License-Identifier: GPL-2.0-or-later
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// This file implements the SSA rewriting algorithm proposed in
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//
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// Simple and Efficient Construction of Static Single Assignment Form.
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// Braun M., Buchwald S., Hack S., Leiba R., Mallon C., Zwinkau A. (2013)
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// In: Jhala R., De Bosschere K. (eds)
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// Compiler Construction. CC 2013.
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// Lecture Notes in Computer Science, vol 7791.
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// Springer, Berlin, Heidelberg
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//
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// https://link.springer.com/chapter/10.1007/978-3-642-37051-9_6
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//
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#include <deque>
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#include <map>
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#include <span>
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#include <unordered_map>
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#include <variant>
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#include <vector>
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#include "shader_recompiler/frontend/ir/basic_block.h"
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#include "shader_recompiler/frontend/ir/opcodes.h"
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#include "shader_recompiler/frontend/ir/pred.h"
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#include "shader_recompiler/frontend/ir/reg.h"
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#include "shader_recompiler/frontend/ir/value.h"
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#include "shader_recompiler/ir_opt/passes.h"
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namespace Shader::Optimization {
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namespace {
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struct FlagTag {
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auto operator<=>(const FlagTag&) const noexcept = default;
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};
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struct ZeroFlagTag : FlagTag {};
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struct SignFlagTag : FlagTag {};
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struct CarryFlagTag : FlagTag {};
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struct OverflowFlagTag : FlagTag {};
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struct GotoVariable : FlagTag {
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GotoVariable() = default;
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explicit GotoVariable(u32 index_) : index{index_} {}
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auto operator<=>(const GotoVariable&) const noexcept = default;
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u32 index;
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};
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struct IndirectBranchVariable {
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auto operator<=>(const IndirectBranchVariable&) const noexcept = default;
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};
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using Variant = std::variant<IR::Reg, IR::Pred, ZeroFlagTag, SignFlagTag, CarryFlagTag,
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OverflowFlagTag, GotoVariable, IndirectBranchVariable>;
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using ValueMap = std::unordered_map<IR::Block*, IR::Value>;
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struct DefTable {
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const IR::Value& Def(IR::Block* block, IR::Reg variable) {
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return block->SsaRegValue(variable);
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}
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void SetDef(IR::Block* block, IR::Reg variable, const IR::Value& value) {
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block->SetSsaRegValue(variable, value);
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}
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const IR::Value& Def(IR::Block* block, IR::Pred variable) {
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return preds[IR::PredIndex(variable)][block];
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}
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void SetDef(IR::Block* block, IR::Pred variable, const IR::Value& value) {
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preds[IR::PredIndex(variable)].insert_or_assign(block, value);
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}
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const IR::Value& Def(IR::Block* block, GotoVariable variable) {
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return goto_vars[variable.index][block];
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}
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void SetDef(IR::Block* block, GotoVariable variable, const IR::Value& value) {
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goto_vars[variable.index].insert_or_assign(block, value);
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}
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const IR::Value& Def(IR::Block* block, IndirectBranchVariable) {
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return indirect_branch_var[block];
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}
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void SetDef(IR::Block* block, IndirectBranchVariable, const IR::Value& value) {
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indirect_branch_var.insert_or_assign(block, value);
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}
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const IR::Value& Def(IR::Block* block, ZeroFlagTag) {
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return zero_flag[block];
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}
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void SetDef(IR::Block* block, ZeroFlagTag, const IR::Value& value) {
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zero_flag.insert_or_assign(block, value);
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}
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const IR::Value& Def(IR::Block* block, SignFlagTag) {
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return sign_flag[block];
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}
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void SetDef(IR::Block* block, SignFlagTag, const IR::Value& value) {
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sign_flag.insert_or_assign(block, value);
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}
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const IR::Value& Def(IR::Block* block, CarryFlagTag) {
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return carry_flag[block];
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}
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void SetDef(IR::Block* block, CarryFlagTag, const IR::Value& value) {
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carry_flag.insert_or_assign(block, value);
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}
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const IR::Value& Def(IR::Block* block, OverflowFlagTag) {
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return overflow_flag[block];
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}
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void SetDef(IR::Block* block, OverflowFlagTag, const IR::Value& value) {
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overflow_flag.insert_or_assign(block, value);
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}
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std::array<ValueMap, IR::NUM_USER_PREDS> preds;
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std::unordered_map<u32, ValueMap> goto_vars;
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ValueMap indirect_branch_var;
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ValueMap zero_flag;
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ValueMap sign_flag;
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ValueMap carry_flag;
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ValueMap overflow_flag;
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};
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IR::Opcode UndefOpcode(IR::Reg) noexcept {
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return IR::Opcode::UndefU32;
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}
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IR::Opcode UndefOpcode(IR::Pred) noexcept {
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return IR::Opcode::UndefU1;
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}
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IR::Opcode UndefOpcode(const FlagTag&) noexcept {
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return IR::Opcode::UndefU1;
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}
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IR::Opcode UndefOpcode(IndirectBranchVariable) noexcept {
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return IR::Opcode::UndefU32;
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}
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enum class Status {
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Start,
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SetValue,
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PreparePhiArgument,
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PushPhiArgument,
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};
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template <typename Type>
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struct ReadState {
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ReadState(IR::Block* block_) : block{block_} {}
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ReadState() = default;
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IR::Block* block{};
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IR::Value result{};
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IR::Inst* phi{};
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IR::Block* const* pred_it{};
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IR::Block* const* pred_end{};
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Status pc{Status::Start};
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};
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class Pass {
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public:
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template <typename Type>
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void WriteVariable(Type variable, IR::Block* block, const IR::Value& value) {
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current_def.SetDef(block, variable, value);
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}
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template <typename Type>
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IR::Value ReadVariable(Type variable, IR::Block* root_block) {
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boost::container::small_vector<ReadState<Type>, 64> stack{
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ReadState<Type>(nullptr),
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ReadState<Type>(root_block),
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};
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const auto prepare_phi_operand{[&] {
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if (stack.back().pred_it == stack.back().pred_end) {
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IR::Inst* const phi{stack.back().phi};
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IR::Block* const block{stack.back().block};
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const IR::Value result{TryRemoveTrivialPhi(*phi, block, UndefOpcode(variable))};
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stack.pop_back();
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stack.back().result = result;
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WriteVariable(variable, block, result);
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} else {
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IR::Block* const imm_pred{*stack.back().pred_it};
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stack.back().pc = Status::PushPhiArgument;
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stack.emplace_back(imm_pred);
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}
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}};
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do {
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IR::Block* const block{stack.back().block};
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switch (stack.back().pc) {
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case Status::Start: {
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if (const IR::Value& def = current_def.Def(block, variable); !def.IsEmpty()) {
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stack.back().result = def;
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} else if (!block->IsSsaSealed()) {
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// Incomplete CFG
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IR::Inst* phi{&*block->PrependNewInst(block->begin(), IR::Opcode::Phi)};
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phi->SetFlags(IR::TypeOf(UndefOpcode(variable)));
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incomplete_phis[block].insert_or_assign(variable, phi);
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stack.back().result = IR::Value{&*phi};
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} else if (const std::span imm_preds = block->ImmPredecessors();
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imm_preds.size() == 1) {
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// Optimize the common case of one predecessor: no phi needed
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stack.back().pc = Status::SetValue;
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stack.emplace_back(imm_preds.front());
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break;
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} else {
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// Break potential cycles with operandless phi
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IR::Inst* const phi{&*block->PrependNewInst(block->begin(), IR::Opcode::Phi)};
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phi->SetFlags(IR::TypeOf(UndefOpcode(variable)));
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WriteVariable(variable, block, IR::Value{phi});
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stack.back().phi = phi;
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stack.back().pred_it = imm_preds.data();
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stack.back().pred_end = imm_preds.data() + imm_preds.size();
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prepare_phi_operand();
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break;
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}
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}
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[[fallthrough]];
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case Status::SetValue: {
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const IR::Value result{stack.back().result};
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WriteVariable(variable, block, result);
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stack.pop_back();
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stack.back().result = result;
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break;
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}
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case Status::PushPhiArgument: {
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IR::Inst* const phi{stack.back().phi};
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phi->AddPhiOperand(*stack.back().pred_it, stack.back().result);
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++stack.back().pred_it;
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}
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[[fallthrough]];
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case Status::PreparePhiArgument:
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prepare_phi_operand();
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break;
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}
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} while (stack.size() > 1);
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return stack.back().result;
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}
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void SealBlock(IR::Block* block) {
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const auto it{incomplete_phis.find(block)};
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if (it != incomplete_phis.end()) {
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for (auto& pair : it->second) {
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auto& variant{pair.first};
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auto& phi{pair.second};
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std::visit([&](auto& variable) { AddPhiOperands(variable, *phi, block); }, variant);
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}
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}
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block->SsaSeal();
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}
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private:
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template <typename Type>
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IR::Value AddPhiOperands(Type variable, IR::Inst& phi, IR::Block* block) {
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for (IR::Block* const imm_pred : block->ImmPredecessors()) {
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phi.AddPhiOperand(imm_pred, ReadVariable(variable, imm_pred));
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}
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return TryRemoveTrivialPhi(phi, block, UndefOpcode(variable));
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}
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IR::Value TryRemoveTrivialPhi(IR::Inst& phi, IR::Block* block, IR::Opcode undef_opcode) {
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IR::Value same;
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const size_t num_args{phi.NumArgs()};
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for (size_t arg_index = 0; arg_index < num_args; ++arg_index) {
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const IR::Value& op{phi.Arg(arg_index)};
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if (op.Resolve() == same.Resolve() || op == IR::Value{&phi}) {
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// Unique value or self-reference
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continue;
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}
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if (!same.IsEmpty()) {
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// The phi merges at least two values: not trivial
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return IR::Value{&phi};
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}
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same = op;
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}
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// Remove the phi node from the block, it will be reinserted
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IR::Block::InstructionList& list{block->Instructions()};
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list.erase(IR::Block::InstructionList::s_iterator_to(phi));
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// Find the first non-phi instruction and use it as an insertion point
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IR::Block::iterator reinsert_point{std::ranges::find_if_not(list, IR::IsPhi)};
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if (same.IsEmpty()) {
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// The phi is unreachable or in the start block
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// Insert an undefined instruction and make it the phi node replacement
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// The "phi" node reinsertion point is specified after this instruction
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reinsert_point = block->PrependNewInst(reinsert_point, undef_opcode);
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same = IR::Value{&*reinsert_point};
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++reinsert_point;
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}
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// Reinsert the phi node and reroute all its uses to the "same" value
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list.insert(reinsert_point, phi);
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phi.ReplaceUsesWith(same);
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// TODO: Try to recursively remove all phi users, which might have become trivial
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return same;
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}
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std::unordered_map<IR::Block*, std::map<Variant, IR::Inst*>> incomplete_phis;
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DefTable current_def;
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};
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void VisitInst(Pass& pass, IR::Block* block, IR::Inst& inst) {
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switch (inst.GetOpcode()) {
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case IR::Opcode::SetRegister:
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if (const IR::Reg reg{inst.Arg(0).Reg()}; reg != IR::Reg::RZ) {
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pass.WriteVariable(reg, block, inst.Arg(1));
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}
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break;
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case IR::Opcode::SetPred:
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if (const IR::Pred pred{inst.Arg(0).Pred()}; pred != IR::Pred::PT) {
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pass.WriteVariable(pred, block, inst.Arg(1));
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}
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break;
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case IR::Opcode::SetGotoVariable:
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pass.WriteVariable(GotoVariable{inst.Arg(0).U32()}, block, inst.Arg(1));
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break;
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case IR::Opcode::SetIndirectBranchVariable:
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pass.WriteVariable(IndirectBranchVariable{}, block, inst.Arg(0));
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break;
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case IR::Opcode::SetZFlag:
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pass.WriteVariable(ZeroFlagTag{}, block, inst.Arg(0));
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break;
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case IR::Opcode::SetSFlag:
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pass.WriteVariable(SignFlagTag{}, block, inst.Arg(0));
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break;
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case IR::Opcode::SetCFlag:
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pass.WriteVariable(CarryFlagTag{}, block, inst.Arg(0));
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break;
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case IR::Opcode::SetOFlag:
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pass.WriteVariable(OverflowFlagTag{}, block, inst.Arg(0));
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break;
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case IR::Opcode::GetRegister:
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if (const IR::Reg reg{inst.Arg(0).Reg()}; reg != IR::Reg::RZ) {
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inst.ReplaceUsesWith(pass.ReadVariable(reg, block));
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}
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break;
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case IR::Opcode::GetPred:
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if (const IR::Pred pred{inst.Arg(0).Pred()}; pred != IR::Pred::PT) {
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inst.ReplaceUsesWith(pass.ReadVariable(pred, block));
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}
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break;
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case IR::Opcode::GetGotoVariable:
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inst.ReplaceUsesWith(pass.ReadVariable(GotoVariable{inst.Arg(0).U32()}, block));
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break;
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case IR::Opcode::GetIndirectBranchVariable:
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inst.ReplaceUsesWith(pass.ReadVariable(IndirectBranchVariable{}, block));
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break;
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case IR::Opcode::GetZFlag:
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inst.ReplaceUsesWith(pass.ReadVariable(ZeroFlagTag{}, block));
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break;
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case IR::Opcode::GetSFlag:
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inst.ReplaceUsesWith(pass.ReadVariable(SignFlagTag{}, block));
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break;
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case IR::Opcode::GetCFlag:
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inst.ReplaceUsesWith(pass.ReadVariable(CarryFlagTag{}, block));
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break;
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case IR::Opcode::GetOFlag:
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inst.ReplaceUsesWith(pass.ReadVariable(OverflowFlagTag{}, block));
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break;
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default:
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break;
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}
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}
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void VisitBlock(Pass& pass, IR::Block* block) {
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for (IR::Inst& inst : block->Instructions()) {
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VisitInst(pass, block, inst);
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}
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pass.SealBlock(block);
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}
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IR::Type GetConcreteType(IR::Inst* inst) {
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std::deque<IR::Inst*> queue;
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queue.push_back(inst);
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while (!queue.empty()) {
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IR::Inst* current = queue.front();
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queue.pop_front();
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const size_t num_args{current->NumArgs()};
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for (size_t i = 0; i < num_args; ++i) {
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const auto set_type = current->Arg(i).Type();
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if (set_type != IR::Type::Opaque) {
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return set_type;
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}
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if (!current->Arg(i).IsImmediate()) {
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queue.push_back(current->Arg(i).Inst());
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}
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}
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}
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return IR::Type::Opaque;
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}
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} // Anonymous namespace
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void SsaRewritePass(IR::Program& program) {
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Pass pass;
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const auto end{program.post_order_blocks.rend()};
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for (auto block = program.post_order_blocks.rbegin(); block != end; ++block) {
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VisitBlock(pass, *block);
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}
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for (auto block = program.post_order_blocks.rbegin(); block != end; ++block) {
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for (IR::Inst& inst : (*block)->Instructions()) {
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if (inst.GetOpcode() == IR::Opcode::Phi) {
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if (inst.Type() == IR::Type::Opaque) {
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inst.SetFlags(GetConcreteType(&inst));
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}
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inst.OrderPhiArgs();
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}
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}
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}
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}
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} // namespace Shader::Optimization
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