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653 commits

Author SHA1 Message Date
Fernando Sahmkow
d6ed31b9fa GPU: Address Feedback. 2020-02-13 18:16:07 -04:00
Fernando Sahmkow
8e9a4944db GPU: Implement GPU Clock correctly. 2020-02-10 10:44:54 -04:00
Fernando Sahmkow
0cb3bcfbb7 Maxwell3D: Correct query reporting. 2020-02-10 10:41:43 -04:00
bunnei
84ea9c2b42 Merge pull request #3372 from ReinUsesLisp/fix-back-stencil 
maxwell_3d: Fix stencil back mask
 2020-02-09 22:29:28 -05:00
bunnei
90df4b8e2b
Merge pull request #3369 from ReinUsesLisp/shf 
shader/shift: Implement SHF
 2020-02-07 22:06:57 -05:00
bunnei
08c508b1c4
Merge pull request #3357 from ReinUsesLisp/bfi-rc 
shader/bfi: Implement register-constant buffer variant
 2020-02-04 15:14:13 -05:00
bunnei
bf21aacc74
Merge pull request #3356 from ReinUsesLisp/fcmp 
shader/arithmetic: Implement FCMP
 2020-02-04 11:36:59 -05:00
ReinUsesLisp
4eed744277 maxwell_3d: Fix stencil back mask 2020-02-02 17:50:46 -03:00
bunnei
b5bbe7e752
Merge pull request #3282 from FernandoS27/indexed-samplers 
Partially implement Indexed samplers in general and specific code in GLSL
 2020-02-01 20:41:40 -05:00
ReinUsesLisp
017474c3f8 shader/shift: Implement SHF_LEFT_{IMM,R} 
Shifts a pair of registers to the left and returns the high register.
 2020-02-01 21:19:44 -03:00
ReinUsesLisp
137a8aa55c shader/bfi: Implement register-constant buffer variant 
It's the same as the variant that was implemented, but it takes the
operands from another source.
 2020-01-27 01:20:38 -03:00
ReinUsesLisp
e3fc3459c8 shader/arithmetic: Implement FCMP 
Compares the third operand with zero, then selects between the first and
second.
 2020-01-27 01:15:44 -03:00
ReinUsesLisp
d95d4ac843 shader/memory: Implement ATOM.ADD 
ATOM operates atomically on global memory. For now only add ATOM.ADD
since that's what was found in commercial games.

This asserts for ATOM.ADD.S32 (handling the others as unimplemented),
although ATOM.ADD.U32 shouldn't be any different.

This change forces us to change the default type on SPIR-V storage
buffers from float to uint. We could also alias the buffers, but it's
simpler for now to just use uint. While we are at it, abstract the code
to avoid repetition.
 2020-01-26 01:54:24 -03:00
Fernando Sahmkow
b97608ca64 Shader_IR: Allow constant access of guest driver. 2020-01-24 16:43:30 -04:00
Fernando Sahmkow
c921e496eb GPU: Implement guest driver profile and deduce texture handler sizes. 2020-01-24 16:43:29 -04:00
bunnei
5a077c95ce
Merge pull request #3322 from ReinUsesLisp/vk-front-face 
vk_graphics_pipeline: Set front facing properly
 2020-01-19 23:22:34 -05:00
ReinUsesLisp
94915d4ea1 vk_graphics_pipeline: Set front facing properly 
Front face was being forced to a certain value when cull face is
disabled. Set a default value on initialization and drop the forcefully
set front facing value with culling disabled.
 2020-01-18 18:50:47 -03:00
bunnei
9bf4850f74
Merge pull request #3305 from ReinUsesLisp/point-size-program 
gl_state: Implement PROGRAM_POINT_SIZE
 2020-01-18 01:56:32 -05:00
ReinUsesLisp
63ba41a26d shader/memory: Implement ATOMS.ADD.U32 2020-01-16 17:30:55 -03:00
Lioncash
9e874898f5 maxwell_3d: Make dirty_pointers private 
This isn't used outside of the class itself, so we can make it private
for the time being.
 2020-01-16 04:07:15 -05:00
ReinUsesLisp
c375d735e6 gl_state: Implement PROGRAM_POINT_SIZE 
For gl_PointSize to have effect we have to activate
GL_PROGRAM_POINT_SIZE.
 2020-01-15 16:14:17 -03:00
ReinUsesLisp
0d6d8129c4 yuzu: Remove Maxwell debugger 
This was carried from Citra and wasn't really used on yuzu. It also adds
some runtime overhead. This commit removes it from yuzu's codebase.
 2020-01-02 23:09:44 -03:00
bunnei
028b2718ed
Merge pull request #3239 from ReinUsesLisp/p2r 
shader/p2r: Implement P2R Pr
 2019-12-31 20:37:16 -05:00
bunnei
8a76f816a4
Merge pull request #3228 from ReinUsesLisp/ptp 
shader/texture: Implement AOFFI and PTP for TLD4 and TLD4S
 2019-12-26 21:43:44 -05:00
Fernando Sahmkow
5619d24377
Merge pull request #3244 from ReinUsesLisp/vk-fps 
fixed_pipeline_state: Define structure and loaders
 2019-12-25 14:31:29 -04:00
bunnei
4af569ee47
Merge pull request #3236 from ReinUsesLisp/rasterize-enable 
gl_rasterizer: Implement RASTERIZE_ENABLE
 2019-12-24 22:54:10 -05:00
ReinUsesLisp
5770418fb3
maxwell_3d: Add depth bounds registers 2019-12-22 22:55:06 -03:00
ReinUsesLisp
cf27b59493
shader/r2p: Refactor P2R to support P2R 2019-12-20 17:55:42 -03:00
ReinUsesLisp
da0aa4da6b
gl_rasterizer: Implement RASTERIZE_ENABLE 
RASTERIZE_ENABLE is the opposite of GL_RASTERIZER_DISCARD. Implement it
naturally using this.

NVN games expect rasterize to be enabled by default, reflect that in our
initial GPU state.
 2019-12-18 19:28:23 -03:00
ReinUsesLisp
8b26b4228b
shader_bytecode: Fix TLD4S encoding 2019-12-17 23:32:10 -03:00
ReinUsesLisp
e09c1fbc1f
shader/texture: Implement TLD4.PTP 2019-12-16 04:09:24 -03:00
Fernando Sahmkow
af89723fa3 Shader_Ir: Correct TLD4S encoding and implement f16 flag. 2019-12-11 19:53:17 -04:00
bunnei
1a66cde175
Merge pull request #3210 from ReinUsesLisp/memory-barrier 
shader: Implement MEMBAR.GL
 2019-12-11 14:24:39 -05:00
Fernando Sahmkow
7ffb672f61 Maxwell3D: Implement Depth Mode. 
This commit finishes adding depth mode that was reverted before due to
other unresolved issues.
 2019-12-10 19:51:46 -04:00
ReinUsesLisp
425a254fa2
shader: Implement MEMBAR.GL 
Implement using memoryBarrier in GLSL and OpMemoryBarrier on SPIR-V.
 2019-12-10 16:45:03 -03:00
ReinUsesLisp
6233b1db08
shader_ir/memory: Implement patch stores 2019-12-09 23:25:21 -03:00
ReinUsesLisp
36651f215a
maxwell_3d: Add tessellation tess level registers 2019-12-06 22:08:22 -03:00
ReinUsesLisp
707bf41c6f
maxwell_3d: Add tessellation mode register 2019-12-06 22:07:31 -03:00
ReinUsesLisp
d2b50c5ebd
maxwell_3d: Add patch vertices register 2019-12-06 22:06:53 -03:00
ReinUsesLisp
74f515e8b6
shader_bytecode: Remove corrupted character 2019-12-06 20:31:56 -03:00
bunnei
e36814d6d5
Merge pull request #3109 from FernandoS27/new-instr 
Implement FLO & TXD Instructions on GPU Shaders
 2019-12-06 18:18:16 -05:00
bunnei
b03242067d
Merge pull request #3098 from ReinUsesLisp/shader-invalidations 
gl_shader_cache: Miscellaneous changes to shaders
 2019-11-24 19:36:30 -05:00
bunnei
b7031b2b9d
Merge pull request #3105 from ReinUsesLisp/fix-stencil-reg 
maxwell_3d: Fix stencil_back_func_mask offset
 2019-11-24 13:53:23 -05:00
ReinUsesLisp
180417c514
gl_shader_cache: Remove dynamic BaseBinding specialization 2019-11-22 21:28:49 -03:00
ReinUsesLisp
c8a48aacc0
video_core: Unify ProgramType and ShaderStage into ShaderType 2019-11-22 21:28:48 -03:00
ReinUsesLisp
287ae2b9e8
gl_shader_cache: Specialize local memory size for compute shaders 
Local memory size in compute shaders was stubbed with an arbitary size.
This commit specializes local memory size from guest GPU parameters.
 2019-11-22 21:28:48 -03:00
ReinUsesLisp
4f5d8e4342
gl_shader_cache: Specialize shader workgroup 
Drop the usage of ARB_compute_variable_group_size and specialize compute
shaders instead. This permits compute to run on AMD and Intel
proprietary drivers.
 2019-11-22 21:28:47 -03:00
ReinUsesLisp
80eacdf89b
texture_cache: Use a table instead of switch for texture formats 
Use a large flat array to look up texture formats. This allows us to
properly implement formats with different component types. It should
also be faster.
 2019-11-14 20:57:10 -03:00
Fernando Sahmkow
cd0f5dfc17 Shader_IR: Implement TXD instruction. 2019-11-14 11:15:27 -04:00
Fernando Sahmkow
f3d1b370aa Shader_IR: Implement FLO instruction. 2019-11-14 11:15:27 -04:00