gl_rasterizer_cache: Update to be based on GPU addresses, not CPU addresses.
This commit is contained in:
bunnei
parent
10c6d89119
commit
4415e00181
10 changed files with 122 additions and 67 deletions
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@ -325,15 +325,29 @@ u8* GetPhysicalPointer(PAddr address) {
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return target_pointer;
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}
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void RasterizerMarkRegionCached(VAddr start, u64 size, bool cached) {
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if (start == 0) {
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void RasterizerMarkRegionCached(Tegra::GPUVAddr gpu_addr, u64 size, bool cached) {
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if (gpu_addr == 0) {
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return;
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}
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u64 num_pages = ((start + size - 1) >> PAGE_BITS) - (start >> PAGE_BITS) + 1;
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VAddr vaddr = start;
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// Iterate over a contiguous CPU address space, which corresponds to the specified GPU address
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// space, marking the region as un/cached. The region is marked un/cached at a granularity of
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// CPU pages, hence why we iterate on a CPU page basis (note: GPU page size is different). This
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// assumes the specified GPU address region is contiguous as well.
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u64 num_pages = ((gpu_addr + size - 1) >> PAGE_BITS) - (gpu_addr >> PAGE_BITS) + 1;
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for (unsigned i = 0; i < num_pages; ++i, gpu_addr += PAGE_SIZE) {
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boost::optional<VAddr> maybe_vaddr =
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Core::System::GetInstance().GPU().memory_manager->GpuToCpuAddress(gpu_addr);
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// The GPU <-> CPU virtual memory mapping is not 1:1
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if (!maybe_vaddr) {
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LOG_ERROR(HW_Memory,
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"Trying to flush a cached region to an invalid physical address %08X",
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gpu_addr);
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continue;
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}
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VAddr vaddr = *maybe_vaddr;
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for (unsigned i = 0; i < num_pages; ++i, vaddr += PAGE_SIZE) {
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PageType& page_type = current_page_table->attributes[vaddr >> PAGE_BITS];
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if (cached) {
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@ -347,6 +361,10 @@ void RasterizerMarkRegionCached(VAddr start, u64 size, bool cached) {
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page_type = PageType::RasterizerCachedMemory;
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current_page_table->pointers[vaddr >> PAGE_BITS] = nullptr;
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break;
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case PageType::RasterizerCachedMemory:
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// There can be more than one GPU region mapped per CPU region, so it's common that
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// this area is already marked as cached.
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break;
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default:
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UNREACHABLE();
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}
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@ -357,6 +375,10 @@ void RasterizerMarkRegionCached(VAddr start, u64 size, bool cached) {
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// It is not necessary for a process to have this region mapped into its address
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// space, for example, a system module need not have a VRAM mapping.
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break;
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case PageType::Memory:
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// There can be more than one GPU region mapped per CPU region, so it's common that
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// this area is already unmarked as cached.
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break;
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case PageType::RasterizerCachedMemory: {
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u8* pointer = GetPointerFromVMA(vaddr & ~PAGE_MASK);
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if (pointer == nullptr) {
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@ -394,20 +416,30 @@ void RasterizerFlushVirtualRegion(VAddr start, u64 size, FlushMode mode) {
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VAddr overlap_start = std::max(start, region_start);
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VAddr overlap_end = std::min(end, region_end);
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std::vector<Tegra::GPUVAddr> gpu_addresses =
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Core::System::GetInstance().GPU().memory_manager->CpuToGpuAddress(overlap_start);
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if (gpu_addresses.empty()) {
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return;
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}
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u64 overlap_size = overlap_end - overlap_start;
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for (const auto& gpu_address : gpu_addresses) {
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auto* rasterizer = VideoCore::g_renderer->Rasterizer();
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switch (mode) {
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case FlushMode::Flush:
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rasterizer->FlushRegion(overlap_start, overlap_size);
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rasterizer->FlushRegion(gpu_address, overlap_size);
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break;
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case FlushMode::Invalidate:
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rasterizer->InvalidateRegion(overlap_start, overlap_size);
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rasterizer->InvalidateRegion(gpu_address, overlap_size);
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break;
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case FlushMode::FlushAndInvalidate:
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rasterizer->FlushAndInvalidateRegion(overlap_start, overlap_size);
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rasterizer->FlushAndInvalidateRegion(gpu_address, overlap_size);
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break;
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}
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}
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};
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CheckRegion(PROCESS_IMAGE_VADDR, PROCESS_IMAGE_VADDR_END);
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@ -14,6 +14,7 @@
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#include <boost/optional.hpp>
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#include "common/common_types.h"
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#include "core/memory_hook.h"
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#include "video_core/memory_manager.h"
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namespace Kernel {
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class Process;
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@ -258,7 +259,7 @@ enum class FlushMode {
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/**
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* Mark each page touching the region as cached.
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*/
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void RasterizerMarkRegionCached(VAddr start, u64 size, bool cached);
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void RasterizerMarkRegionCached(Tegra::GPUVAddr start, u64 size, bool cached);
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/**
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* Flushes and invalidates any externally cached rasterizer resources touching the given virtual
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@ -11,7 +11,6 @@
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#include <boost/optional.hpp>
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#include "common/common_types.h"
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#include "core/memory.h"
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namespace Tegra {
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@ -6,6 +6,7 @@
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#include "common/common_types.h"
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#include "video_core/gpu.h"
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#include "video_core/memory_manager.h"
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struct ScreenInfo;
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@ -25,14 +26,14 @@ public:
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virtual void FlushAll() = 0;
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/// Notify rasterizer that any caches of the specified region should be flushed to Switch memory
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virtual void FlushRegion(VAddr addr, u64 size) = 0;
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virtual void FlushRegion(Tegra::GPUVAddr addr, u64 size) = 0;
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/// Notify rasterizer that any caches of the specified region should be invalidated
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virtual void InvalidateRegion(VAddr addr, u64 size) = 0;
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virtual void InvalidateRegion(Tegra::GPUVAddr addr, u64 size) = 0;
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/// Notify rasterizer that any caches of the specified region should be flushed to Switch memory
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/// and invalidated
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virtual void FlushAndInvalidateRegion(VAddr addr, u64 size) = 0;
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virtual void FlushAndInvalidateRegion(Tegra::GPUVAddr addr, u64 size) = 0;
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/// Attempt to use a faster method to perform a display transfer with is_texture_copy = 0
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virtual bool AccelerateDisplayTransfer(const void* config) {
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@ -150,9 +150,8 @@ std::pair<u8*, GLintptr> RasterizerOpenGL::SetupVertexArrays(u8* array_ptr,
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u64 size = end - start + 1;
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// Copy vertex array data
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const VAddr data_addr{*memory_manager->GpuToCpuAddress(start)};
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res_cache.FlushRegion(data_addr, size, nullptr);
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Memory::ReadBlock(data_addr, array_ptr, size);
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res_cache.FlushRegion(start, size, nullptr);
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Memory::ReadBlock(*memory_manager->GpuToCpuAddress(start), array_ptr, size);
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// Bind the vertex array to the buffer at the current offset.
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glBindVertexBuffer(index, stream_buffer->GetHandle(), buffer_offset, vertex_array.stride);
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@ -519,17 +518,17 @@ void RasterizerOpenGL::FlushAll() {
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res_cache.FlushAll();
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}
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void RasterizerOpenGL::FlushRegion(VAddr addr, u64 size) {
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void RasterizerOpenGL::FlushRegion(Tegra::GPUVAddr addr, u64 size) {
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MICROPROFILE_SCOPE(OpenGL_CacheManagement);
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res_cache.FlushRegion(addr, size);
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}
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void RasterizerOpenGL::InvalidateRegion(VAddr addr, u64 size) {
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void RasterizerOpenGL::InvalidateRegion(Tegra::GPUVAddr addr, u64 size) {
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MICROPROFILE_SCOPE(OpenGL_CacheManagement);
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res_cache.InvalidateRegion(addr, size, nullptr);
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}
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void RasterizerOpenGL::FlushAndInvalidateRegion(VAddr addr, u64 size) {
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void RasterizerOpenGL::FlushAndInvalidateRegion(Tegra::GPUVAddr addr, u64 size) {
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MICROPROFILE_SCOPE(OpenGL_CacheManagement);
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res_cache.FlushRegion(addr, size);
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res_cache.InvalidateRegion(addr, size, nullptr);
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@ -560,7 +559,7 @@ bool RasterizerOpenGL::AccelerateDisplay(const Tegra::FramebufferConfig& framebu
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MICROPROFILE_SCOPE(OpenGL_CacheManagement);
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SurfaceParams src_params;
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src_params.addr = framebuffer_addr;
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src_params.cpu_addr = framebuffer_addr;
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src_params.width = std::min(framebuffer.width, pixel_stride);
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src_params.height = framebuffer.height;
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src_params.stride = pixel_stride;
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@ -11,6 +11,7 @@
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#include <glad/glad.h>
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#include "common/common_types.h"
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#include "video_core/engines/maxwell_3d.h"
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#include "video_core/memory_manager.h"
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#include "video_core/rasterizer_interface.h"
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#include "video_core/renderer_opengl/gl_rasterizer_cache.h"
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#include "video_core/renderer_opengl/gl_resource_manager.h"
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@ -29,9 +30,9 @@ public:
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void DrawArrays() override;
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void NotifyMaxwellRegisterChanged(u32 method) override;
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void FlushAll() override;
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void FlushRegion(VAddr addr, u64 size) override;
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void InvalidateRegion(VAddr addr, u64 size) override;
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void FlushAndInvalidateRegion(VAddr addr, u64 size) override;
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void FlushRegion(Tegra::GPUVAddr addr, u64 size) override;
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void InvalidateRegion(Tegra::GPUVAddr addr, u64 size) override;
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void FlushAndInvalidateRegion(Tegra::GPUVAddr addr, u64 size) override;
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bool AccelerateDisplayTransfer(const void* config) override;
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bool AccelerateTextureCopy(const void* config) override;
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bool AccelerateFill(const void* config) override;
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@ -83,26 +83,30 @@ static u16 GetResolutionScaleFactor() {
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}
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template <bool morton_to_gl, PixelFormat format>
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void MortonCopy(u32 stride, u32 block_height, u32 height, u8* gl_buffer, VAddr base, VAddr start,
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VAddr end) {
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void MortonCopy(u32 stride, u32 block_height, u32 height, u8* gl_buffer, Tegra::GPUVAddr base,
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Tegra::GPUVAddr start, Tegra::GPUVAddr end) {
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constexpr u32 bytes_per_pixel = SurfaceParams::GetFormatBpp(format) / 8;
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constexpr u32 gl_bytes_per_pixel = CachedSurface::GetGLBytesPerPixel(format);
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const auto& gpu = Core::System::GetInstance().GPU();
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if (morton_to_gl) {
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auto data = Tegra::Texture::UnswizzleTexture(
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base, SurfaceParams::TextureFormatFromPixelFormat(format), stride, height,
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block_height);
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*gpu.memory_manager->GpuToCpuAddress(base),
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SurfaceParams::TextureFormatFromPixelFormat(format), stride, height, block_height);
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std::memcpy(gl_buffer, data.data(), data.size());
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} else {
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// TODO(bunnei): Assumes the default rendering GOB size of 16 (128 lines). We should check
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// the configuration for this and perform more generic un/swizzle
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LOG_WARNING(Render_OpenGL, "need to use correct swizzle/GOB parameters!");
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VideoCore::MortonCopyPixels128(stride, height, bytes_per_pixel, gl_bytes_per_pixel,
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Memory::GetPointer(base), gl_buffer, morton_to_gl);
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VideoCore::MortonCopyPixels128(
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stride, height, bytes_per_pixel, gl_bytes_per_pixel,
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Memory::GetPointer(*gpu.memory_manager->GpuToCpuAddress(base)), gl_buffer,
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morton_to_gl);
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}
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}
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static constexpr std::array<void (*)(u32, u32, u32, u8*, VAddr, VAddr, VAddr),
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static constexpr std::array<void (*)(u32, u32, u32, u8*, Tegra::GPUVAddr, Tegra::GPUVAddr,
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Tegra::GPUVAddr),
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SurfaceParams::MaxPixelFormat>
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morton_to_gl_fns = {
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MortonCopy<true, PixelFormat::ABGR8>, MortonCopy<true, PixelFormat::B5G6R5>,
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@ -110,7 +114,8 @@ static constexpr std::array<void (*)(u32, u32, u32, u8*, VAddr, VAddr, VAddr),
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MortonCopy<true, PixelFormat::DXT23>, MortonCopy<true, PixelFormat::DXT45>,
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};
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static constexpr std::array<void (*)(u32, u32, u32, u8*, VAddr, VAddr, VAddr),
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static constexpr std::array<void (*)(u32, u32, u32, u8*, Tegra::GPUVAddr, Tegra::GPUVAddr,
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Tegra::GPUVAddr),
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SurfaceParams::MaxPixelFormat>
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gl_to_morton_fns = {
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MortonCopy<false, PixelFormat::ABGR8>,
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@ -219,9 +224,9 @@ SurfaceParams SurfaceParams::FromInterval(SurfaceInterval interval) const {
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SurfaceParams params = *this;
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const u32 tiled_size = is_tiled ? 8 : 1;
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const u64 stride_tiled_bytes = BytesInPixels(stride * tiled_size);
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VAddr aligned_start =
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Tegra::GPUVAddr aligned_start =
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addr + Common::AlignDown(boost::icl::first(interval) - addr, stride_tiled_bytes);
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VAddr aligned_end =
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Tegra::GPUVAddr aligned_end =
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addr + Common::AlignUp(boost::icl::last_next(interval) - addr, stride_tiled_bytes);
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if (aligned_end - aligned_start > stride_tiled_bytes) {
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@ -342,6 +347,13 @@ bool SurfaceParams::CanTexCopy(const SurfaceParams& texcopy_params) const {
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return FromInterval(texcopy_params.GetInterval()).GetInterval() == texcopy_params.GetInterval();
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}
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VAddr SurfaceParams::GetCpuAddr() const {
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// When this function is used, only cpu_addr or (GPU) addr should be set, not both
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ASSERT(!(cpu_addr && addr));
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const auto& gpu = Core::System::GetInstance().GPU();
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return cpu_addr.get_value_or(*gpu.memory_manager->GpuToCpuAddress(addr));
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}
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bool CachedSurface::CanFill(const SurfaceParams& dest_surface,
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SurfaceInterval fill_interval) const {
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if (type == SurfaceType::Fill && IsRegionValid(fill_interval) &&
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@ -456,10 +468,10 @@ void RasterizerCacheOpenGL::CopySurface(const Surface& src_surface, const Surfac
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}
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MICROPROFILE_DEFINE(OpenGL_SurfaceLoad, "OpenGL", "Surface Load", MP_RGB(128, 64, 192));
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void CachedSurface::LoadGLBuffer(VAddr load_start, VAddr load_end) {
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void CachedSurface::LoadGLBuffer(Tegra::GPUVAddr load_start, Tegra::GPUVAddr load_end) {
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ASSERT(type != SurfaceType::Fill);
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u8* const texture_src_data = Memory::GetPointer(addr);
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u8* const texture_src_data = Memory::GetPointer(GetCpuAddr());
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if (texture_src_data == nullptr)
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return;
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@ -485,8 +497,8 @@ void CachedSurface::LoadGLBuffer(VAddr load_start, VAddr load_end) {
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}
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MICROPROFILE_DEFINE(OpenGL_SurfaceFlush, "OpenGL", "Surface Flush", MP_RGB(128, 192, 64));
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void CachedSurface::FlushGLBuffer(VAddr flush_start, VAddr flush_end) {
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u8* const dst_buffer = Memory::GetPointer(addr);
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void CachedSurface::FlushGLBuffer(Tegra::GPUVAddr flush_start, Tegra::GPUVAddr flush_end) {
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u8* const dst_buffer = Memory::GetPointer(GetCpuAddr());
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if (dst_buffer == nullptr)
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return;
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@ -1028,7 +1040,7 @@ Surface RasterizerCacheOpenGL::GetTextureSurface(const Tegra::Texture::FullTextu
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auto& gpu = Core::System::GetInstance().GPU();
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SurfaceParams params;
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params.addr = *gpu.memory_manager->GpuToCpuAddress(config.tic.Address());
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params.addr = config.tic.Address();
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params.width = config.tic.Width();
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params.height = config.tic.Height();
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params.is_tiled = config.tic.IsTiled();
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@ -1045,7 +1057,7 @@ Surface RasterizerCacheOpenGL::GetTextureSurface(const Tegra::Texture::FullTextu
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params.block_height = config.tic.BlockHeight();
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} else {
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// Use the texture-provided stride value if the texture isn't tiled.
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params.stride = params.PixelsInBytes(config.tic.Pitch());
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params.stride = static_cast<u32>(params.PixelsInBytes(config.tic.Pitch()));
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}
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params.UpdateParams();
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@ -1073,7 +1085,6 @@ Surface RasterizerCacheOpenGL::GetTextureSurface(const Tegra::Texture::FullTextu
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SurfaceSurfaceRect_Tuple RasterizerCacheOpenGL::GetFramebufferSurfaces(
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bool using_color_fb, bool using_depth_fb, const MathUtil::Rectangle<s32>& viewport) {
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const auto& regs = Core::System().GetInstance().GPU().Maxwell3D().regs;
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const auto& memory_manager = Core::System().GetInstance().GPU().memory_manager;
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const auto& config = regs.rt[0];
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// TODO(bunnei): This is hard corded to use just the first render buffer
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@ -1106,7 +1117,7 @@ SurfaceSurfaceRect_Tuple RasterizerCacheOpenGL::GetFramebufferSurfaces(
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color_params.block_height = Tegra::Texture::TICEntry::DefaultBlockHeight;
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SurfaceParams depth_params = color_params;
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color_params.addr = *memory_manager->GpuToCpuAddress(config.Address());
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color_params.addr = config.Address();
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color_params.pixel_format = SurfaceParams::PixelFormatFromRenderTargetFormat(config.format);
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color_params.component_type = SurfaceParams::ComponentTypeFromRenderTarget(config.format);
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color_params.UpdateParams();
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@ -1222,7 +1233,8 @@ void RasterizerCacheOpenGL::DuplicateSurface(const Surface& src_surface,
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}
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}
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void RasterizerCacheOpenGL::ValidateSurface(const Surface& surface, VAddr addr, u64 size) {
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void RasterizerCacheOpenGL::ValidateSurface(const Surface& surface, Tegra::GPUVAddr addr,
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u64 size) {
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if (size == 0)
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return;
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@ -1261,7 +1273,7 @@ void RasterizerCacheOpenGL::ValidateSurface(const Surface& surface, VAddr addr,
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}
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}
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void RasterizerCacheOpenGL::FlushRegion(VAddr addr, u64 size, Surface flush_surface) {
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void RasterizerCacheOpenGL::FlushRegion(Tegra::GPUVAddr addr, u64 size, Surface flush_surface) {
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if (size == 0)
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return;
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@ -1297,7 +1309,8 @@ void RasterizerCacheOpenGL::FlushAll() {
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FlushRegion(0, Kernel::VMManager::MAX_ADDRESS);
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}
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void RasterizerCacheOpenGL::InvalidateRegion(VAddr addr, u64 size, const Surface& region_owner) {
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void RasterizerCacheOpenGL::InvalidateRegion(Tegra::GPUVAddr addr, u64 size,
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const Surface& region_owner) {
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if (size == 0)
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return;
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|
|
@ -1390,7 +1403,7 @@ void RasterizerCacheOpenGL::UnregisterSurface(const Surface& surface) {
|
|||
surface_cache.subtract({surface->GetInterval(), SurfaceSet{surface}});
|
||||
}
|
||||
|
||||
void RasterizerCacheOpenGL::UpdatePagesCachedCount(VAddr addr, u64 size, int delta) {
|
||||
void RasterizerCacheOpenGL::UpdatePagesCachedCount(Tegra::GPUVAddr addr, u64 size, int delta) {
|
||||
const u64 num_pages =
|
||||
((addr + size - 1) >> Memory::PAGE_BITS) - (addr >> Memory::PAGE_BITS) + 1;
|
||||
const u64 page_start = addr >> Memory::PAGE_BITS;
|
||||
|
|
@ -1406,8 +1419,10 @@ void RasterizerCacheOpenGL::UpdatePagesCachedCount(VAddr addr, u64 size, int del
|
|||
const auto interval = pair.first & pages_interval;
|
||||
const int count = pair.second;
|
||||
|
||||
const VAddr interval_start_addr = boost::icl::first(interval) << Memory::PAGE_BITS;
|
||||
const VAddr interval_end_addr = boost::icl::last_next(interval) << Memory::PAGE_BITS;
|
||||
const Tegra::GPUVAddr interval_start_addr = boost::icl::first(interval)
|
||||
<< Memory::PAGE_BITS;
|
||||
const Tegra::GPUVAddr interval_end_addr = boost::icl::last_next(interval)
|
||||
<< Memory::PAGE_BITS;
|
||||
const u64 interval_size = interval_end_addr - interval_start_addr;
|
||||
|
||||
if (delta > 0 && count == delta)
|
||||
|
|
|
|||
|
|
@ -17,12 +17,14 @@
|
|||
#ifdef __GNUC__
|
||||
#pragma GCC diagnostic pop
|
||||
#endif
|
||||
#include <boost/optional.hpp>
|
||||
#include <glad/glad.h>
|
||||
#include "common/assert.h"
|
||||
#include "common/common_funcs.h"
|
||||
#include "common/common_types.h"
|
||||
#include "common/math_util.h"
|
||||
#include "video_core/gpu.h"
|
||||
#include "video_core/memory_manager.h"
|
||||
#include "video_core/renderer_opengl/gl_resource_manager.h"
|
||||
#include "video_core/textures/texture.h"
|
||||
|
||||
|
|
@ -30,9 +32,9 @@ struct CachedSurface;
|
|||
using Surface = std::shared_ptr<CachedSurface>;
|
||||
using SurfaceSet = std::set<Surface>;
|
||||
|
||||
using SurfaceRegions = boost::icl::interval_set<VAddr>;
|
||||
using SurfaceMap = boost::icl::interval_map<VAddr, Surface>;
|
||||
using SurfaceCache = boost::icl::interval_map<VAddr, SurfaceSet>;
|
||||
using SurfaceRegions = boost::icl::interval_set<Tegra::GPUVAddr>;
|
||||
using SurfaceMap = boost::icl::interval_map<Tegra::GPUVAddr, Surface>;
|
||||
using SurfaceCache = boost::icl::interval_map<Tegra::GPUVAddr, SurfaceSet>;
|
||||
|
||||
using SurfaceInterval = SurfaceCache::interval_type;
|
||||
static_assert(std::is_same<SurfaceRegions::interval_type, SurfaceCache::interval_type>() &&
|
||||
|
|
@ -277,6 +279,8 @@ struct SurfaceParams {
|
|||
return pixels * GetFormatBpp(pixel_format) / CHAR_BIT;
|
||||
}
|
||||
|
||||
VAddr GetCpuAddr() const;
|
||||
|
||||
bool ExactMatch(const SurfaceParams& other_surface) const;
|
||||
bool CanSubRect(const SurfaceParams& sub_surface) const;
|
||||
bool CanExpand(const SurfaceParams& expanded_surface) const;
|
||||
|
|
@ -285,8 +289,9 @@ struct SurfaceParams {
|
|||
MathUtil::Rectangle<u32> GetSubRect(const SurfaceParams& sub_surface) const;
|
||||
MathUtil::Rectangle<u32> GetScaledSubRect(const SurfaceParams& sub_surface) const;
|
||||
|
||||
VAddr addr = 0;
|
||||
VAddr end = 0;
|
||||
Tegra::GPUVAddr addr = 0;
|
||||
Tegra::GPUVAddr end = 0;
|
||||
boost::optional<VAddr> cpu_addr;
|
||||
u64 size = 0;
|
||||
|
||||
u32 width = 0;
|
||||
|
|
@ -332,8 +337,8 @@ struct CachedSurface : SurfaceParams {
|
|||
size_t gl_buffer_size = 0;
|
||||
|
||||
// Read/Write data in Switch memory to/from gl_buffer
|
||||
void LoadGLBuffer(VAddr load_start, VAddr load_end);
|
||||
void FlushGLBuffer(VAddr flush_start, VAddr flush_end);
|
||||
void LoadGLBuffer(Tegra::GPUVAddr load_start, Tegra::GPUVAddr load_end);
|
||||
void FlushGLBuffer(Tegra::GPUVAddr flush_start, Tegra::GPUVAddr flush_end);
|
||||
|
||||
// Upload/Download data in gl_buffer in/to this surface's texture
|
||||
void UploadGLTexture(const MathUtil::Rectangle<u32>& rect, GLuint read_fb_handle,
|
||||
|
|
@ -381,10 +386,10 @@ public:
|
|||
SurfaceRect_Tuple GetTexCopySurface(const SurfaceParams& params);
|
||||
|
||||
/// Write any cached resources overlapping the region back to memory (if dirty)
|
||||
void FlushRegion(VAddr addr, u64 size, Surface flush_surface = nullptr);
|
||||
void FlushRegion(Tegra::GPUVAddr addr, u64 size, Surface flush_surface = nullptr);
|
||||
|
||||
/// Mark region as being invalidated by region_owner (nullptr if Switch memory)
|
||||
void InvalidateRegion(VAddr addr, u64 size, const Surface& region_owner);
|
||||
void InvalidateRegion(Tegra::GPUVAddr addr, u64 size, const Surface& region_owner);
|
||||
|
||||
/// Flush all cached resources tracked by this cache manager
|
||||
void FlushAll();
|
||||
|
|
@ -393,7 +398,7 @@ private:
|
|||
void DuplicateSurface(const Surface& src_surface, const Surface& dest_surface);
|
||||
|
||||
/// Update surface's texture for given region when necessary
|
||||
void ValidateSurface(const Surface& surface, VAddr addr, u64 size);
|
||||
void ValidateSurface(const Surface& surface, Tegra::GPUVAddr addr, u64 size);
|
||||
|
||||
/// Create a new surface
|
||||
Surface CreateSurface(const SurfaceParams& params);
|
||||
|
|
@ -405,7 +410,7 @@ private:
|
|||
void UnregisterSurface(const Surface& surface);
|
||||
|
||||
/// Increase/decrease the number of surface in pages touching the specified region
|
||||
void UpdatePagesCachedCount(VAddr addr, u64 size, int delta);
|
||||
void UpdatePagesCachedCount(Tegra::GPUVAddr addr, u64 size, int delta);
|
||||
|
||||
SurfaceCache surface_cache;
|
||||
PageMap cached_pages;
|
||||
|
|
|
|||
|
|
@ -152,7 +152,8 @@ void RendererOpenGL::LoadFBToScreenInfo(const Tegra::FramebufferConfig& framebuf
|
|||
screen_info.display_texture = screen_info.texture.resource.handle;
|
||||
screen_info.display_texcoords = MathUtil::Rectangle<float>(0.f, 0.f, 1.f, 1.f);
|
||||
|
||||
Rasterizer()->FlushRegion(framebuffer_addr, size_in_bytes);
|
||||
Memory::RasterizerFlushVirtualRegion(framebuffer_addr, size_in_bytes,
|
||||
Memory::FlushMode::Flush);
|
||||
|
||||
VideoCore::MortonCopyPixels128(framebuffer.width, framebuffer.height, bytes_per_pixel, 4,
|
||||
Memory::GetPointer(framebuffer_addr),
|
||||
|
|
|
|||
|
|
@ -4,6 +4,7 @@
|
|||
|
||||
#include <cstring>
|
||||
#include "common/assert.h"
|
||||
#include "core/memory.h"
|
||||
#include "video_core/textures/decoders.h"
|
||||
#include "video_core/textures/texture.h"
|
||||
|
||||
|
|
|
|||
Loading…
Reference in a new issue