yuzu/src/shader_recompiler/backend/spirv/emit_spirv_composite.cpp

Ignoring revisions in .git-blame-ignore-revs. Click here to bypass and see the normal blame view.

154 lines
5.3 KiB
C++
Raw Normal View History

// SPDX-FileCopyrightText: Copyright 2021 yuzu Emulator Project
// SPDX-License-Identifier: GPL-2.0-or-later
2021-02-08 05:54:35 +00:00
#include "shader_recompiler/backend/spirv/emit_spirv_instructions.h"
#include "shader_recompiler/backend/spirv/spirv_emit_context.h"
2021-02-08 05:54:35 +00:00
namespace Shader::Backend::SPIRV {
Id EmitCompositeConstructU32x2(EmitContext& ctx, Id e1, Id e2) {
2021-02-19 21:10:18 +00:00
return ctx.OpCompositeConstruct(ctx.U32[2], e1, e2);
2021-02-08 05:54:35 +00:00
}
2021-02-19 21:10:18 +00:00
Id EmitCompositeConstructU32x3(EmitContext& ctx, Id e1, Id e2, Id e3) {
return ctx.OpCompositeConstruct(ctx.U32[3], e1, e2, e3);
2021-02-08 05:54:35 +00:00
}
2021-02-19 21:10:18 +00:00
Id EmitCompositeConstructU32x4(EmitContext& ctx, Id e1, Id e2, Id e3, Id e4) {
return ctx.OpCompositeConstruct(ctx.U32[4], e1, e2, e3, e4);
2021-02-08 05:54:35 +00:00
}
2021-02-19 21:10:18 +00:00
Id EmitCompositeExtractU32x2(EmitContext& ctx, Id composite, u32 index) {
return ctx.OpCompositeExtract(ctx.U32[1], composite, index);
2021-02-08 05:54:35 +00:00
}
2021-02-19 21:10:18 +00:00
Id EmitCompositeExtractU32x3(EmitContext& ctx, Id composite, u32 index) {
return ctx.OpCompositeExtract(ctx.U32[1], composite, index);
2021-02-08 05:54:35 +00:00
}
2021-02-19 21:10:18 +00:00
Id EmitCompositeExtractU32x4(EmitContext& ctx, Id composite, u32 index) {
return ctx.OpCompositeExtract(ctx.U32[1], composite, index);
2021-02-08 05:54:35 +00:00
}
2021-03-03 06:07:19 +00:00
Id EmitCompositeInsertU32x2(EmitContext& ctx, Id composite, Id object, u32 index) {
return ctx.OpCompositeInsert(ctx.U32[2], object, composite, index);
2021-02-08 05:54:35 +00:00
}
2021-03-03 06:07:19 +00:00
Id EmitCompositeInsertU32x3(EmitContext& ctx, Id composite, Id object, u32 index) {
return ctx.OpCompositeInsert(ctx.U32[3], object, composite, index);
2021-02-08 05:54:35 +00:00
}
2021-03-03 06:07:19 +00:00
Id EmitCompositeInsertU32x4(EmitContext& ctx, Id composite, Id object, u32 index) {
return ctx.OpCompositeInsert(ctx.U32[4], object, composite, index);
}
Id EmitCompositeConstructF16x2(EmitContext& ctx, Id e1, Id e2) {
2021-03-03 06:07:19 +00:00
return ctx.OpCompositeConstruct(ctx.F16[2], e1, e2);
}
Id EmitCompositeConstructF16x3(EmitContext& ctx, Id e1, Id e2, Id e3) {
return ctx.OpCompositeConstruct(ctx.F16[3], e1, e2, e3);
}
Id EmitCompositeConstructF16x4(EmitContext& ctx, Id e1, Id e2, Id e3, Id e4) {
return ctx.OpCompositeConstruct(ctx.F16[4], e1, e2, e3, e4);
2021-02-08 05:54:35 +00:00
}
2021-02-19 21:10:18 +00:00
Id EmitCompositeExtractF16x2(EmitContext& ctx, Id composite, u32 index) {
return ctx.OpCompositeExtract(ctx.F16[1], composite, index);
2021-02-08 05:54:35 +00:00
}
2021-02-19 21:10:18 +00:00
Id EmitCompositeExtractF16x3(EmitContext& ctx, Id composite, u32 index) {
return ctx.OpCompositeExtract(ctx.F16[1], composite, index);
2021-02-08 05:54:35 +00:00
}
2021-02-19 21:10:18 +00:00
Id EmitCompositeExtractF16x4(EmitContext& ctx, Id composite, u32 index) {
return ctx.OpCompositeExtract(ctx.F16[1], composite, index);
2021-02-08 05:54:35 +00:00
}
2021-03-03 06:07:19 +00:00
Id EmitCompositeInsertF16x2(EmitContext& ctx, Id composite, Id object, u32 index) {
return ctx.OpCompositeInsert(ctx.F16[2], object, composite, index);
2021-02-08 05:54:35 +00:00
}
2021-03-03 06:07:19 +00:00
Id EmitCompositeInsertF16x3(EmitContext& ctx, Id composite, Id object, u32 index) {
return ctx.OpCompositeInsert(ctx.F16[3], object, composite, index);
2021-02-08 05:54:35 +00:00
}
2021-03-03 06:07:19 +00:00
Id EmitCompositeInsertF16x4(EmitContext& ctx, Id composite, Id object, u32 index) {
return ctx.OpCompositeInsert(ctx.F16[4], object, composite, index);
}
Id EmitCompositeConstructF32x2(EmitContext& ctx, Id e1, Id e2) {
2021-03-03 06:07:19 +00:00
return ctx.OpCompositeConstruct(ctx.F32[2], e1, e2);
}
Id EmitCompositeConstructF32x3(EmitContext& ctx, Id e1, Id e2, Id e3) {
return ctx.OpCompositeConstruct(ctx.F32[3], e1, e2, e3);
}
Id EmitCompositeConstructF32x4(EmitContext& ctx, Id e1, Id e2, Id e3, Id e4) {
return ctx.OpCompositeConstruct(ctx.F32[4], e1, e2, e3, e4);
2021-02-08 05:54:35 +00:00
}
2021-02-19 21:10:18 +00:00
Id EmitCompositeExtractF32x2(EmitContext& ctx, Id composite, u32 index) {
return ctx.OpCompositeExtract(ctx.F32[1], composite, index);
2021-02-08 05:54:35 +00:00
}
2021-02-19 21:10:18 +00:00
Id EmitCompositeExtractF32x3(EmitContext& ctx, Id composite, u32 index) {
return ctx.OpCompositeExtract(ctx.F32[1], composite, index);
2021-02-08 05:54:35 +00:00
}
2021-02-19 21:10:18 +00:00
Id EmitCompositeExtractF32x4(EmitContext& ctx, Id composite, u32 index) {
return ctx.OpCompositeExtract(ctx.F32[1], composite, index);
2021-02-08 05:54:35 +00:00
}
2021-03-03 06:07:19 +00:00
Id EmitCompositeInsertF32x2(EmitContext& ctx, Id composite, Id object, u32 index) {
return ctx.OpCompositeInsert(ctx.F32[2], object, composite, index);
}
Id EmitCompositeInsertF32x3(EmitContext& ctx, Id composite, Id object, u32 index) {
return ctx.OpCompositeInsert(ctx.F32[3], object, composite, index);
}
Id EmitCompositeInsertF32x4(EmitContext& ctx, Id composite, Id object, u32 index) {
return ctx.OpCompositeInsert(ctx.F32[4], object, composite, index);
}
2021-02-17 03:59:28 +00:00
void EmitCompositeConstructF64x2(EmitContext&) {
2021-02-08 05:54:35 +00:00
throw NotImplementedException("SPIR-V Instruction");
}
2021-02-17 03:59:28 +00:00
void EmitCompositeConstructF64x3(EmitContext&) {
2021-02-08 05:54:35 +00:00
throw NotImplementedException("SPIR-V Instruction");
}
2021-02-17 03:59:28 +00:00
void EmitCompositeConstructF64x4(EmitContext&) {
2021-02-08 05:54:35 +00:00
throw NotImplementedException("SPIR-V Instruction");
}
2021-02-17 03:59:28 +00:00
void EmitCompositeExtractF64x2(EmitContext&) {
2021-02-08 05:54:35 +00:00
throw NotImplementedException("SPIR-V Instruction");
}
2021-02-17 03:59:28 +00:00
void EmitCompositeExtractF64x3(EmitContext&) {
2021-02-08 05:54:35 +00:00
throw NotImplementedException("SPIR-V Instruction");
}
2021-02-17 03:59:28 +00:00
void EmitCompositeExtractF64x4(EmitContext&) {
2021-02-08 05:54:35 +00:00
throw NotImplementedException("SPIR-V Instruction");
}
2021-03-03 06:07:19 +00:00
Id EmitCompositeInsertF64x2(EmitContext& ctx, Id composite, Id object, u32 index) {
return ctx.OpCompositeInsert(ctx.F64[2], object, composite, index);
}
Id EmitCompositeInsertF64x3(EmitContext& ctx, Id composite, Id object, u32 index) {
return ctx.OpCompositeInsert(ctx.F64[3], object, composite, index);
}
Id EmitCompositeInsertF64x4(EmitContext& ctx, Id composite, Id object, u32 index) {
return ctx.OpCompositeInsert(ctx.F64[4], object, composite, index);
}
2021-02-08 05:54:35 +00:00
} // namespace Shader::Backend::SPIRV