2021-05-08 20:28:52 +01:00
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// Copyright 2021 yuzu Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#include "shader_recompiler/backend/glasm/emit_context.h"
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#include "shader_recompiler/backend/glasm/emit_glasm_instructions.h"
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#include "shader_recompiler/frontend/ir/value.h"
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namespace Shader::Backend::GLASM {
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2021-05-09 07:11:34 +01:00
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void EmitIAdd32(EmitContext& ctx, IR::Inst& inst, ScalarS32 a, ScalarS32 b) {
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ctx.Add("ADD.S {}.x,{},{};", inst, a, b);
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}
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2021-05-09 07:11:34 +01:00
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void EmitIAdd64([[maybe_unused]] EmitContext& ctx, [[maybe_unused]] Register a,
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[[maybe_unused]] Register b) {
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throw NotImplementedException("GLASM instruction");
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}
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2021-05-09 07:11:34 +01:00
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void EmitISub32(EmitContext& ctx, IR::Inst& inst, ScalarS32 a, ScalarS32 b) {
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ctx.Add("SUB.S {}.x,{},{};", inst, a, b);
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2021-05-08 20:28:52 +01:00
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}
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2021-05-09 07:11:34 +01:00
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void EmitISub64([[maybe_unused]] EmitContext& ctx, [[maybe_unused]] Register a,
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[[maybe_unused]] Register b) {
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throw NotImplementedException("GLASM instruction");
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}
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2021-05-09 07:11:34 +01:00
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void EmitIMul32(EmitContext& ctx, IR::Inst& inst, ScalarS32 a, ScalarS32 b) {
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ctx.Add("MUL.S {}.x,{},{};", inst, a, b);
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}
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void EmitINeg32(EmitContext& ctx, IR::Inst& inst, ScalarS32 value) {
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ctx.Add("MOV.S {},-{};", inst, value);
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}
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void EmitINeg64([[maybe_unused]] EmitContext& ctx, [[maybe_unused]] Register value) {
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throw NotImplementedException("GLASM instruction");
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}
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2021-05-09 23:49:27 +01:00
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void EmitIAbs32(EmitContext& ctx, IR::Inst& inst, ScalarS32 value) {
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ctx.Add("ABS.S {},{};", inst, value);
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}
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void EmitIAbs64([[maybe_unused]] EmitContext& ctx, [[maybe_unused]] Register value) {
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throw NotImplementedException("GLASM instruction");
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}
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2021-05-09 07:11:34 +01:00
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void EmitShiftLeftLogical32(EmitContext& ctx, IR::Inst& inst, ScalarU32 base, ScalarU32 shift) {
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ctx.Add("SHL.U {}.x,{},{};", inst, base, shift);
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}
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void EmitShiftLeftLogical64([[maybe_unused]] EmitContext& ctx, [[maybe_unused]] Register base,
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[[maybe_unused]] Register shift) {
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throw NotImplementedException("GLASM instruction");
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}
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void EmitShiftRightLogical32(EmitContext& ctx, IR::Inst& inst, ScalarU32 base, ScalarU32 shift) {
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ctx.Add("SHR.U {}.x,{},{};", inst, base, shift);
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}
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void EmitShiftRightLogical64([[maybe_unused]] EmitContext& ctx, [[maybe_unused]] Register base,
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[[maybe_unused]] Register shift) {
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throw NotImplementedException("GLASM instruction");
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}
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void EmitShiftRightArithmetic32(EmitContext& ctx, IR::Inst& inst, ScalarS32 base, ScalarS32 shift) {
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ctx.Add("SHR.S {}.x,{},{};", inst, base, shift);
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}
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void EmitShiftRightArithmetic64([[maybe_unused]] EmitContext& ctx, [[maybe_unused]] Register base,
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[[maybe_unused]] Register shift) {
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throw NotImplementedException("GLASM instruction");
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}
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void EmitBitwiseAnd32(EmitContext& ctx, IR::Inst& inst, ScalarS32 a, ScalarS32 b) {
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ctx.Add("AND.S {}.x,{},{};", inst, a, b);
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}
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void EmitBitwiseOr32(EmitContext& ctx, IR::Inst& inst, ScalarS32 a, ScalarS32 b) {
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ctx.Add("OR.S {}.x,{},{};", inst, a, b);
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}
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void EmitBitwiseXor32(EmitContext& ctx, IR::Inst& inst, ScalarS32 a, ScalarS32 b) {
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ctx.Add("XOR.S {}.x,{},{};", inst, a, b);
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}
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2021-05-09 22:57:57 +01:00
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void EmitBitFieldInsert(EmitContext& ctx, IR::Inst& inst, ScalarS32 base, ScalarS32 insert,
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ScalarS32 offset, ScalarS32 count) {
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ctx.Add("MOV.U RC.x,{};MOV.U RC.y,{};", count, offset);
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ctx.Add("BFI.S {},RC,{},{};", inst, insert, base);
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}
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void EmitBitFieldSExtract(EmitContext& ctx, IR::Inst& inst, ScalarS32 base, ScalarS32 offset,
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ScalarS32 count) {
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ctx.Add("MOV.U RC.x,{};MOV.U RC.y,{};", count, offset);
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ctx.Add("BFE.S {},RC,{};", inst, base);
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}
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void EmitBitFieldUExtract(EmitContext& ctx, IR::Inst& inst, ScalarU32 base, ScalarU32 offset,
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ScalarU32 count) {
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ctx.Add("MOV.U RC.x,{};MOV.U RC.y,{};", count, offset);
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ctx.Add("BFE.U {},RC,{};", inst, base);
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}
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void EmitBitReverse32(EmitContext& ctx, IR::Inst& inst, ScalarS32 value) {
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ctx.Add("BFR {},{};", inst, value);
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}
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void EmitBitCount32(EmitContext& ctx, IR::Inst& inst, ScalarS32 value) {
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ctx.Add("BTC {},{};", inst, value);
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}
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void EmitBitwiseNot32(EmitContext& ctx, IR::Inst& inst, ScalarS32 value) {
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ctx.Add("NOT.S {},{};", inst, value);
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}
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void EmitFindSMsb32(EmitContext& ctx, IR::Inst& inst, ScalarS32 value) {
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ctx.Add("BTFM.S {},{};", inst, value);
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}
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void EmitFindUMsb32(EmitContext& ctx, IR::Inst& inst, ScalarU32 value) {
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ctx.Add("BTFM.U {},{};", inst, value);
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}
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void EmitSMin32(EmitContext& ctx, IR::Inst& inst, ScalarS32 a, ScalarS32 b) {
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ctx.Add("MIN.S {},{},{};", inst, a, b);
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}
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void EmitUMin32(EmitContext& ctx, IR::Inst& inst, ScalarU32 a, ScalarU32 b) {
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ctx.Add("MIN.U {},{},{};", inst, a, b);
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}
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void EmitSMax32(EmitContext& ctx, IR::Inst& inst, ScalarS32 a, ScalarS32 b) {
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ctx.Add("MAX.S {},{},{};", inst, a, b);
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}
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void EmitUMax32(EmitContext& ctx, IR::Inst& inst, ScalarU32 a, ScalarU32 b) {
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ctx.Add("MAX.U {},{},{};", inst, a, b);
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}
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void EmitSClamp32(EmitContext& ctx, IR::Inst& inst, ScalarS32 value, ScalarS32 min, ScalarS32 max) {
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const Register ret{ctx.reg_alloc.Define(inst)};
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ctx.Add("MIN.S {}.x,{},{};", ret, max, value);
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ctx.Add("MAX.S {}.x,{},{};", ret, ret, min);
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}
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void EmitUClamp32(EmitContext& ctx, IR::Inst& inst, ScalarU32 value, ScalarU32 min, ScalarU32 max) {
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const Register ret{ctx.reg_alloc.Define(inst)};
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ctx.Add("MIN.U {}.x,{},{};", ret, max, value);
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ctx.Add("MAX.U {}.x,{},{};", ret, ret, min);
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}
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void EmitSLessThan(EmitContext& ctx, IR::Inst& inst, ScalarS32 lhs, ScalarS32 rhs) {
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ctx.Add("SLT.S {},{},{};", inst, lhs, rhs);
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}
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void EmitULessThan(EmitContext& ctx, IR::Inst& inst, ScalarU32 lhs, ScalarU32 rhs) {
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ctx.Add("SLT.U {},{},{};", inst, lhs, rhs);
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}
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void EmitIEqual(EmitContext& ctx, IR::Inst& inst, ScalarS32 lhs, ScalarS32 rhs) {
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ctx.Add("SEQ.S {},{},{};", inst, lhs, rhs);
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}
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void EmitSLessThanEqual(EmitContext& ctx, IR::Inst& inst, ScalarS32 lhs, ScalarS32 rhs) {
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ctx.Add("SLE.S {},{},{};", inst, lhs, rhs);
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}
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2021-05-09 22:57:57 +01:00
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void EmitULessThanEqual(EmitContext& ctx, IR::Inst& inst, ScalarU32 lhs, ScalarU32 rhs) {
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ctx.Add("SLE.U {},{},{};", inst, lhs, rhs);
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}
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void EmitSGreaterThan(EmitContext& ctx, IR::Inst& inst, ScalarS32 lhs, ScalarS32 rhs) {
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ctx.Add("SGT.S {},{},{};", inst, lhs, rhs);
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}
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void EmitUGreaterThan(EmitContext& ctx, IR::Inst& inst, ScalarU32 lhs, ScalarU32 rhs) {
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ctx.Add("SGT.U {},{},{};", inst, lhs, rhs);
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}
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void EmitINotEqual(EmitContext& ctx, IR::Inst& inst, ScalarS32 lhs, ScalarS32 rhs) {
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ctx.Add("SNE.U {},{},{};", inst, lhs, rhs);
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}
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void EmitSGreaterThanEqual(EmitContext& ctx, IR::Inst& inst, ScalarS32 lhs, ScalarS32 rhs) {
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ctx.Add("SGE.S {},{},{};", inst, lhs, rhs);
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}
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2021-05-09 22:57:57 +01:00
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void EmitUGreaterThanEqual(EmitContext& ctx, IR::Inst& inst, ScalarU32 lhs, ScalarU32 rhs) {
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ctx.Add("SGE.U {},{},{};", inst, lhs, rhs);
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}
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} // namespace Shader::Backend::GLASM
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