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yuzu/src/shader_recompiler/frontend/ir/opcodes.inc

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shader: Initial recompiler work
2021-01-09 06:30:07 +00:00
// Copyright 2021 yuzu Emulator Project
// Licensed under GPLv2 or any later version
// Refer to the license.txt file included.
// opcode name, return type, arg1 type, arg2 type, arg3 type, arg4 type, ...
shader: Properly store phi on Inst
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OPCODE(Phi, Opaque, )
shader: Initial recompiler work
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OPCODE(Identity, Opaque, Opaque, )
shader: Fix control flow
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OPCODE(Void, Void, )
shader: Initial recompiler work
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// Control flow
OPCODE(Branch, Void, Label, )
OPCODE(BranchConditional, Void, U1, Label, Label, )
shader: Initial implementation of an AST
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OPCODE(LoopMerge, Void, Label, Label, )
OPCODE(SelectionMerge, Void, Label, )
shader: Initial recompiler work
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OPCODE(Return, Void, )
// Context getters/setters
OPCODE(GetRegister, U32, Reg, )
OPCODE(SetRegister, Void, Reg, U32, )
OPCODE(GetPred, U1, Pred, )
OPCODE(SetPred, Void, Pred, U1, )
shader: Initial implementation of an AST
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OPCODE(GetGotoVariable, U1, U32, )
OPCODE(SetGotoVariable, Void, U32, U1, )
shader: Initial recompiler work
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OPCODE(GetCbuf, U32, U32, U32, )
OPCODE(GetAttribute, U32, Attribute, )
spirv: Initial SPIR-V support
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OPCODE(SetAttribute, Void, Attribute, U32, )
shader: Initial recompiler work
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OPCODE(GetAttributeIndexed, U32, U32, )
spirv: Initial SPIR-V support
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OPCODE(SetAttributeIndexed, Void, U32, U32, )
shader: Initial recompiler work
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OPCODE(GetZFlag, U1, Void, )
OPCODE(GetSFlag, U1, Void, )
OPCODE(GetCFlag, U1, Void, )
OPCODE(GetOFlag, U1, Void, )
OPCODE(SetZFlag, Void, U1, )
OPCODE(SetSFlag, Void, U1, )
OPCODE(SetCFlag, Void, U1, )
OPCODE(SetOFlag, Void, U1, )
spirv: Initial SPIR-V support
2021-02-08 05:54:35 +00:00
OPCODE(WorkgroupId, U32x3, )
OPCODE(LocalInvocationId, U32x3, )
shader: Initial recompiler work
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shader: SSA and dominance
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// Undefined
shader: Initial implementation of an AST
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OPCODE(UndefU1, U1, )
OPCODE(UndefU8, U8, )
OPCODE(UndefU16, U16, )
OPCODE(UndefU32, U32, )
OPCODE(UndefU64, U64, )
shader: SSA and dominance
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shader: Initial recompiler work
2021-01-09 06:30:07 +00:00
// Memory operations
shader: Initial instruction support
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OPCODE(LoadGlobalU8, U32, U64, )
OPCODE(LoadGlobalS8, U32, U64, )
OPCODE(LoadGlobalU16, U32, U64, )
OPCODE(LoadGlobalS16, U32, U64, )
OPCODE(LoadGlobal32, U32, U64, )
shader: Make typed IR
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OPCODE(LoadGlobal64, U32x2, U64, )
OPCODE(LoadGlobal128, U32x4, U64, )
shader: Initial recompiler work
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OPCODE(WriteGlobalU8, Void, U64, U32, )
OPCODE(WriteGlobalS8, Void, U64, U32, )
OPCODE(WriteGlobalU16, Void, U64, U32, )
OPCODE(WriteGlobalS16, Void, U64, U32, )
OPCODE(WriteGlobal32, Void, U64, U32, )
shader: Make typed IR
2021-02-05 22:19:36 +00:00
OPCODE(WriteGlobal64, Void, U64, U32x2, )
OPCODE(WriteGlobal128, Void, U64, U32x4, )
shader: Initial recompiler work
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shader: Constant propagation and global memory to storage buffer
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// Storage buffer operations
OPCODE(LoadStorageU8, U32, U32, U32, )
OPCODE(LoadStorageS8, U32, U32, U32, )
OPCODE(LoadStorageU16, U32, U32, U32, )
OPCODE(LoadStorageS16, U32, U32, U32, )
OPCODE(LoadStorage32, U32, U32, U32, )
shader: Make typed IR
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OPCODE(LoadStorage64, U32x2, U32, U32, )
OPCODE(LoadStorage128, U32x4, U32, U32, )
OPCODE(WriteStorageU8, Void, U32, U32, U32, )
OPCODE(WriteStorageS8, Void, U32, U32, U32, )
OPCODE(WriteStorageU16, Void, U32, U32, U32, )
OPCODE(WriteStorageS16, Void, U32, U32, U32, )
OPCODE(WriteStorage32, Void, U32, U32, U32, )
OPCODE(WriteStorage64, Void, U32, U32, U32x2, )
OPCODE(WriteStorage128, Void, U32, U32, U32x4, )
shader: Constant propagation and global memory to storage buffer
2021-02-05 08:58:02 +00:00
shader: Initial recompiler work
2021-01-09 06:30:07 +00:00
// Vector utility
shader: Make typed IR
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OPCODE(CompositeConstructU32x2, U32x2, U32, U32, )
OPCODE(CompositeConstructU32x3, U32x3, U32, U32, U32, )
OPCODE(CompositeConstructU32x4, U32x4, U32, U32, U32, U32, )
OPCODE(CompositeExtractU32x2, U32, U32x2, U32, )
OPCODE(CompositeExtractU32x3, U32, U32x3, U32, )
OPCODE(CompositeExtractU32x4, U32, U32x4, U32, )
shader: Implement HADD2
2021-03-03 06:07:19 +00:00
OPCODE(CompositeInsertU32x2, U32x2, U32x2, U32, U32, )
OPCODE(CompositeInsertU32x3, U32x3, U32x3, U32, U32, )
OPCODE(CompositeInsertU32x4, U32x4, U32x4, U32, U32, )
shader: Make typed IR
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OPCODE(CompositeConstructF16x2, F16x2, F16, F16, )
OPCODE(CompositeConstructF16x3, F16x3, F16, F16, F16, )
OPCODE(CompositeConstructF16x4, F16x4, F16, F16, F16, F16, )
OPCODE(CompositeExtractF16x2, F16, F16x2, U32, )
OPCODE(CompositeExtractF16x3, F16, F16x3, U32, )
OPCODE(CompositeExtractF16x4, F16, F16x4, U32, )
shader: Implement HADD2
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OPCODE(CompositeInsertF16x2, F16x2, F16x2, F16, U32, )
OPCODE(CompositeInsertF16x3, F16x3, F16x3, F16, U32, )
OPCODE(CompositeInsertF16x4, F16x4, F16x4, F16, U32, )
shader: Make typed IR
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OPCODE(CompositeConstructF32x2, F32x2, F32, F32, )
OPCODE(CompositeConstructF32x3, F32x3, F32, F32, F32, )
OPCODE(CompositeConstructF32x4, F32x4, F32, F32, F32, F32, )
OPCODE(CompositeExtractF32x2, F32, F32x2, U32, )
OPCODE(CompositeExtractF32x3, F32, F32x3, U32, )
OPCODE(CompositeExtractF32x4, F32, F32x4, U32, )
shader: Implement HADD2
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OPCODE(CompositeInsertF32x2, F32x2, F32x2, F32, U32, )
OPCODE(CompositeInsertF32x3, F32x3, F32x3, F32, U32, )
OPCODE(CompositeInsertF32x4, F32x4, F32x4, F32, U32, )
shader: Make typed IR
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OPCODE(CompositeConstructF64x2, F64x2, F64, F64, )
OPCODE(CompositeConstructF64x3, F64x3, F64, F64, F64, )
OPCODE(CompositeConstructF64x4, F64x4, F64, F64, F64, F64, )
OPCODE(CompositeExtractF64x2, F64, F64x2, U32, )
OPCODE(CompositeExtractF64x3, F64, F64x3, U32, )
OPCODE(CompositeExtractF64x4, F64, F64x4, U32, )
shader: Implement HADD2
2021-03-03 06:07:19 +00:00
OPCODE(CompositeInsertF64x2, F64x2, F64x2, F64, U32, )
OPCODE(CompositeInsertF64x3, F64x3, F64x3, F64, U32, )
OPCODE(CompositeInsertF64x4, F64x4, F64x4, F64, U32, )
shader: Initial recompiler work
2021-01-09 06:30:07 +00:00
shader: Initial instruction support
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// Select operations
shader: FMUL, select, RRO, and MUFU fixes
2021-02-23 01:59:16 +00:00
OPCODE(SelectU8, U8, U1, U8, U8, )
OPCODE(SelectU16, U16, U1, U16, U16, )
OPCODE(SelectU32, U32, U1, U32, U32, )
OPCODE(SelectU64, U64, U1, U64, U64, )
OPCODE(SelectF16, F16, U1, F16, F16, )
OPCODE(SelectF32, F32, U1, F32, F32, )
shader: Initial instruction support
2021-02-03 19:43:04 +00:00
shader: Initial recompiler work
2021-01-09 06:30:07 +00:00
// Bitwise conversions
shader: Make typed IR
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OPCODE(BitCastU16F16, U16, F16, )
OPCODE(BitCastU32F32, U32, F32, )
OPCODE(BitCastU64F64, U64, F64, )
OPCODE(BitCastF16U16, F16, U16, )
OPCODE(BitCastF32U32, F32, U32, )
OPCODE(BitCastF64U64, F64, U64, )
OPCODE(PackUint2x32, U64, U32x2, )
OPCODE(UnpackUint2x32, U32x2, U64, )
OPCODE(PackFloat2x16, U32, F16x2, )
OPCODE(UnpackFloat2x16, F16x2, U32, )
spirv: Add lower fp16 to fp32 pass
2021-02-19 21:10:18 +00:00
OPCODE(PackHalf2x16, U32, F32x2, )
OPCODE(UnpackHalf2x16, F32x2, U32, )
OPCODE(PackDouble2x32, F64, U32x2, )
OPCODE(UnpackDouble2x32, U32x2, F64, )
shader: Initial recompiler work
2021-01-09 06:30:07 +00:00
// Pseudo-operation, handled specially at final emit
OPCODE(GetZeroFromOp, U1, Opaque, )
OPCODE(GetSignFromOp, U1, Opaque, )
OPCODE(GetCarryFromOp, U1, Opaque, )
OPCODE(GetOverflowFromOp, U1, Opaque, )
// Floating-point operations
shader: Make typed IR
2021-02-05 22:19:36 +00:00
OPCODE(FPAbs16, F16, F16, )
OPCODE(FPAbs32, F32, F32, )
OPCODE(FPAbs64, F64, F64, )
OPCODE(FPAdd16, F16, F16, F16, )
OPCODE(FPAdd32, F32, F32, F32, )
OPCODE(FPAdd64, F64, F64, F64, )
OPCODE(FPFma16, F16, F16, F16, F16, )
OPCODE(FPFma32, F32, F32, F32, F32, )
OPCODE(FPFma64, F64, F64, F64, F64, )
OPCODE(FPMax32, F32, F32, F32, )
OPCODE(FPMax64, F64, F64, F64, )
OPCODE(FPMin32, F32, F32, F32, )
OPCODE(FPMin64, F64, F64, F64, )
OPCODE(FPMul16, F16, F16, F16, )
OPCODE(FPMul32, F32, F32, F32, )
OPCODE(FPMul64, F64, F64, F64, )
OPCODE(FPNeg16, F16, F16, )
OPCODE(FPNeg32, F32, F32, )
OPCODE(FPNeg64, F64, F64, )
OPCODE(FPRecip32, F32, F32, )
OPCODE(FPRecip64, F64, F64, )
OPCODE(FPRecipSqrt32, F32, F32, )
OPCODE(FPRecipSqrt64, F64, F64, )
OPCODE(FPSqrt, F32, F32, )
OPCODE(FPSin, F32, F32, )
OPCODE(FPExp2, F32, F32, )
OPCODE(FPCos, F32, F32, )
OPCODE(FPLog2, F32, F32, )
OPCODE(FPSaturate16, F16, F16, )
OPCODE(FPSaturate32, F32, F32, )
OPCODE(FPSaturate64, F64, F64, )
OPCODE(FPRoundEven16, F16, F16, )
OPCODE(FPRoundEven32, F32, F32, )
OPCODE(FPRoundEven64, F64, F64, )
OPCODE(FPFloor16, F16, F16, )
OPCODE(FPFloor32, F32, F32, )
OPCODE(FPFloor64, F64, F64, )
OPCODE(FPCeil16, F16, F16, )
OPCODE(FPCeil32, F32, F32, )
OPCODE(FPCeil64, F64, F64, )
OPCODE(FPTrunc16, F16, F16, )
OPCODE(FPTrunc32, F32, F32, )
OPCODE(FPTrunc64, F64, F64, )
shader: Initial instruction support
2021-02-03 19:43:04 +00:00
shader: FMUL, select, RRO, and MUFU fixes
2021-02-23 01:59:16 +00:00
OPCODE(FPOrdEqual16, U1, F16, F16, )
OPCODE(FPOrdEqual32, U1, F32, F32, )
OPCODE(FPOrdEqual64, U1, F64, F64, )
OPCODE(FPUnordEqual16, U1, F16, F16, )
OPCODE(FPUnordEqual32, U1, F32, F32, )
OPCODE(FPUnordEqual64, U1, F64, F64, )
OPCODE(FPOrdNotEqual16, U1, F16, F16, )
OPCODE(FPOrdNotEqual32, U1, F32, F32, )
OPCODE(FPOrdNotEqual64, U1, F64, F64, )
OPCODE(FPUnordNotEqual16, U1, F16, F16, )
OPCODE(FPUnordNotEqual32, U1, F32, F32, )
OPCODE(FPUnordNotEqual64, U1, F64, F64, )
OPCODE(FPOrdLessThan16, U1, F16, F16, )
OPCODE(FPOrdLessThan32, U1, F32, F32, )
OPCODE(FPOrdLessThan64, U1, F64, F64, )
OPCODE(FPUnordLessThan16, U1, F16, F16, )
OPCODE(FPUnordLessThan32, U1, F32, F32, )
OPCODE(FPUnordLessThan64, U1, F64, F64, )
OPCODE(FPOrdGreaterThan16, U1, F16, F16, )
OPCODE(FPOrdGreaterThan32, U1, F32, F32, )
OPCODE(FPOrdGreaterThan64, U1, F64, F64, )
OPCODE(FPUnordGreaterThan16, U1, F16, F16, )
OPCODE(FPUnordGreaterThan32, U1, F32, F32, )
OPCODE(FPUnordGreaterThan64, U1, F64, F64, )
OPCODE(FPOrdLessThanEqual16, U1, F16, F16, )
OPCODE(FPOrdLessThanEqual32, U1, F32, F32, )
OPCODE(FPOrdLessThanEqual64, U1, F64, F64, )
OPCODE(FPUnordLessThanEqual16, U1, F16, F16, )
OPCODE(FPUnordLessThanEqual32, U1, F32, F32, )
OPCODE(FPUnordLessThanEqual64, U1, F64, F64, )
OPCODE(FPOrdGreaterThanEqual16, U1, F16, F16, )
OPCODE(FPOrdGreaterThanEqual32, U1, F32, F32, )
OPCODE(FPOrdGreaterThanEqual64, U1, F64, F64, )
OPCODE(FPUnordGreaterThanEqual16, U1, F16, F16, )
OPCODE(FPUnordGreaterThanEqual32, U1, F32, F32, )
OPCODE(FPUnordGreaterThanEqual64, U1, F64, F64, )
shader: Initial instruction support
2021-02-03 19:43:04 +00:00
// Integer operations
OPCODE(IAdd32, U32, U32, U32, )
OPCODE(IAdd64, U64, U64, U64, )
shader: Constant propagation and global memory to storage buffer
2021-02-05 08:58:02 +00:00
OPCODE(ISub32, U32, U32, U32, )
OPCODE(ISub64, U64, U64, U64, )
shader: Initial instruction support
2021-02-03 19:43:04 +00:00
OPCODE(IMul32, U32, U32, U32, )
OPCODE(INeg32, U32, U32, )
shader: Implement LEA
2021-03-05 06:15:16 +00:00
OPCODE(INeg64, U64, U64, )
shader: Initial instruction support
2021-02-03 19:43:04 +00:00
OPCODE(IAbs32, U32, U32, )
OPCODE(ShiftLeftLogical32, U32, U32, U32, )
OPCODE(ShiftRightLogical32, U32, U32, U32, )
shader: Implement LEA
2021-03-05 06:15:16 +00:00
OPCODE(ShiftRightLogical64, U64, U64, U32, )
shader: Initial instruction support
2021-02-03 19:43:04 +00:00
OPCODE(ShiftRightArithmetic32, U32, U32, U32, )
OPCODE(BitwiseAnd32, U32, U32, U32, )
OPCODE(BitwiseOr32, U32, U32, U32, )
OPCODE(BitwiseXor32, U32, U32, U32, )
OPCODE(BitFieldInsert, U32, U32, U32, U32, U32, )
OPCODE(BitFieldSExtract, U32, U32, U32, U32, )
OPCODE(BitFieldUExtract, U32, U32, U32, U32, )
shader: Implement SHR
2021-02-25 05:46:40 +00:00
OPCODE(BitReverse32, U32, U32, )
shader: Implement POPC
2021-02-27 02:41:46 +00:00
OPCODE(BitCount32, U32, U32, )
OPCODE(BitwiseNot32, U32, U32, )
shader: Initial instruction support
2021-02-03 19:43:04 +00:00
shader: Implement FLO
2021-03-01 20:58:16 +00:00
OPCODE(FindSMsb32, U32, U32, )
OPCODE(FindUMsb32, U32, U32, )
shader: Implement IMNMX
2021-03-01 04:33:53 +00:00
OPCODE(SMin32, U32, U32, U32, )
OPCODE(UMin32, U32, U32, U32, )
OPCODE(SMax32, U32, U32, U32, )
OPCODE(UMax32, U32, U32, U32, )
shader: Initial instruction support
2021-02-03 19:43:04 +00:00
OPCODE(SLessThan, U1, U32, U32, )
OPCODE(ULessThan, U1, U32, U32, )
OPCODE(IEqual, U1, U32, U32, )
OPCODE(SLessThanEqual, U1, U32, U32, )
OPCODE(ULessThanEqual, U1, U32, U32, )
OPCODE(SGreaterThan, U1, U32, U32, )
OPCODE(UGreaterThan, U1, U32, U32, )
OPCODE(INotEqual, U1, U32, U32, )
OPCODE(SGreaterThanEqual, U1, U32, U32, )
OPCODE(UGreaterThanEqual, U1, U32, U32, )
shader: Initial recompiler work
2021-01-09 06:30:07 +00:00
// Logical operations
OPCODE(LogicalOr, U1, U1, U1, )
OPCODE(LogicalAnd, U1, U1, U1, )
shader: Initial instruction support
2021-02-03 19:43:04 +00:00
OPCODE(LogicalXor, U1, U1, U1, )
shader: Initial recompiler work
2021-01-09 06:30:07 +00:00
OPCODE(LogicalNot, U1, U1, )
// Conversion operations
shader: Make typed IR
2021-02-05 22:19:36 +00:00
OPCODE(ConvertS16F16, U32, F16, )
OPCODE(ConvertS16F32, U32, F32, )
OPCODE(ConvertS16F64, U32, F64, )
OPCODE(ConvertS32F16, U32, F16, )
OPCODE(ConvertS32F32, U32, F32, )
OPCODE(ConvertS32F64, U32, F64, )
OPCODE(ConvertS64F16, U64, F16, )
OPCODE(ConvertS64F32, U64, F32, )
OPCODE(ConvertS64F64, U64, F64, )
OPCODE(ConvertU16F16, U32, F16, )
OPCODE(ConvertU16F32, U32, F32, )
OPCODE(ConvertU16F64, U32, F64, )
OPCODE(ConvertU32F16, U32, F16, )
OPCODE(ConvertU32F32, U32, F32, )
OPCODE(ConvertU32F64, U32, F64, )
OPCODE(ConvertU64F16, U64, F16, )
OPCODE(ConvertU64F32, U64, F32, )
OPCODE(ConvertU64F64, U64, F64, )
shader: Initial recompiler work
2021-01-09 06:30:07 +00:00
OPCODE(ConvertU64U32, U64, U32, )
OPCODE(ConvertU32U64, U32, U64, )
shader: Implement HADD2
2021-03-03 06:07:19 +00:00
OPCODE(ConvertF16F32, F16, F32, )
OPCODE(ConvertF32F16, F32, F16, )
OPCODE(ConvertF32F64, F32, F64, )
OPCODE(ConvertF64F32, F64, F32, )
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