mirror of
https://github.com/yuzu-mirror/yuzu.git
synced 2024-11-18 07:29:59 +00:00
-converted tabs to spaces
-moved scratchpad memory out of MemArena
This commit is contained in:
bunnei
parent
81b61ee720
commit
e05be0145c
2 changed files with 144 additions and 148 deletions
|
|
@ -33,74 +33,71 @@
|
||||||
namespace Memory {
|
namespace Memory {
|
||||||
|
|
||||||
|
|
||||||
u8* g_base = NULL; ///< The base pointer to the auto-mirrored arena.
|
u8* g_base = NULL; ///< The base pointer to the auto-mirrored arena.
|
||||||
|
|
||||||
MemArena g_arena; ///< The MemArena class
|
MemArena g_arena; ///< The MemArena class
|
||||||
|
|
||||||
u8* g_bootrom = NULL; ///< Bootrom memory (super secret code/data @ 0x8000) pointer
|
u8* g_bootrom = NULL; ///< Bootrom physical memory
|
||||||
u8* g_fcram = NULL; ///< Main memory (FCRAM) pointer
|
u8* g_fcram = NULL; ///< Main memory (FCRAM) pointer
|
||||||
u8* g_vram = NULL; ///< Video memory (VRAM) pointer
|
u8* g_vram = NULL; ///< Video memory (VRAM) pointer
|
||||||
u8* g_scratchpad = NULL; ///< [Hack] Seperate mem for stack space because I don't know where this goes
|
u8* g_scratchpad = NULL; ///< Scratchpad memory - Used for main thread stack
|
||||||
|
|
||||||
u8* g_physical_bootrom = NULL; ///< Bootrom physical memory (super secret code/data @ 0x8000)
|
u8* g_physical_bootrom = NULL; ///< Bootrom physical memory
|
||||||
u8* g_uncached_bootrom = NULL;
|
u8* g_uncached_bootrom = NULL;
|
||||||
|
|
||||||
u8* g_physical_fcram = NULL; ///< Main physical memory (FCRAM)
|
|
||||||
u8* g_physical_vram = NULL; ///< Video physical memory (VRAM)
|
|
||||||
u8* g_physical_scratchpad = NULL; ///< Scratchpad memory used for main thread stack
|
|
||||||
|
|
||||||
|
u8* g_physical_fcram = NULL; ///< Main physical memory (FCRAM)
|
||||||
|
u8* g_physical_vram = NULL; ///< Video physical memory (VRAM)
|
||||||
|
u8* g_physical_scratchpad = NULL; ///< Scratchpad memory used for main thread stack
|
||||||
|
|
||||||
// We don't declare the IO region in here since its handled by other means.
|
// We don't declare the IO region in here since its handled by other means.
|
||||||
static MemoryView g_views[] =
|
static MemoryView g_views[] = {
|
||||||
{
|
{ &g_vram, &g_physical_vram, MEM_VRAM_VADDR, MEM_VRAM_SIZE, 0 },
|
||||||
{&g_scratchpad, &g_physical_scratchpad, 0x00000000, MEM_SCRATCHPAD_SIZE, 0 },
|
{ &g_fcram, &g_physical_fcram, MEM_FCRAM_VADDR, MEM_FCRAM_SIZE, MV_IS_PRIMARY_RAM },
|
||||||
// {&g_bootrom, &g_physical_bootrom, 0x00000000, MEM_BOOTROM_SIZE, 0},
|
|
||||||
// {NULL, &g_uncached_bootrom, 0x00010000, MEM_BOOTROM_SIZE, MV_MIRROR_PREVIOUS},
|
|
||||||
// {NULL, NULL, 0x17E00000, MEM_MPCORE_PRIV_SIZE, 0},
|
|
||||||
{&g_vram, &g_physical_vram, MEM_VRAM_VADDR, MEM_VRAM_SIZE, MV_IS_PRIMARY_RAM},
|
|
||||||
// {NULL, NULL, 0x1FF00000, MEM_DSP_SIZE, 0},
|
|
||||||
// {NULL, NULL, 0x1FF80000, MEM_AXI_WRAM_SIZE, 0},
|
|
||||||
|
|
||||||
{&g_fcram, &g_physical_fcram, MEM_FCRAM_VADDR, MEM_FCRAM_SIZE, MV_IS_PRIMARY_RAM},
|
|
||||||
|
|
||||||
};
|
};
|
||||||
|
|
||||||
/*static MemoryView views[] =
|
/*static MemoryView views[] =
|
||||||
{
|
{
|
||||||
{&m_pScratchPad, &m_pPhysicalScratchPad, 0x00010000, SCRATCHPAD_SIZE, 0},
|
{&m_pScratchPad, &m_pPhysicalScratchPad, 0x00010000, SCRATCHPAD_SIZE, 0},
|
||||||
{NULL, &m_pUncachedScratchPad, 0x40010000, SCRATCHPAD_SIZE, MV_MIRROR_PREVIOUS},
|
{NULL, &m_pUncachedScratchPad, 0x40010000, SCRATCHPAD_SIZE, MV_MIRROR_PREVIOUS},
|
||||||
{&m_pVRAM, &m_pPhysicalVRAM, 0x04000000, 0x00800000, 0},
|
{&m_pVRAM, &m_pPhysicalVRAM, 0x04000000, 0x00800000, 0},
|
||||||
{NULL, &m_pUncachedVRAM, 0x44000000, 0x00800000, MV_MIRROR_PREVIOUS},
|
{NULL, &m_pUncachedVRAM, 0x44000000, 0x00800000, MV_MIRROR_PREVIOUS},
|
||||||
{&m_pRAM, &m_pPhysicalRAM, 0x08000000, g_MemorySize, MV_IS_PRIMARY_RAM}, // only from 0x08800000 is it usable (last 24 megs)
|
{&m_pRAM, &m_pPhysicalRAM, 0x08000000, g_MemorySize, MV_IS_PRIMARY_RAM}, // only from 0x08800000 is it usable (last 24 megs)
|
||||||
{NULL, &m_pUncachedRAM, 0x48000000, g_MemorySize, MV_MIRROR_PREVIOUS | MV_IS_PRIMARY_RAM},
|
{NULL, &m_pUncachedRAM, 0x48000000, g_MemorySize, MV_MIRROR_PREVIOUS | MV_IS_PRIMARY_RAM},
|
||||||
{NULL, &m_pKernelRAM, 0x88000000, g_MemorySize, MV_MIRROR_PREVIOUS | MV_IS_PRIMARY_RAM},
|
{NULL, &m_pKernelRAM, 0x88000000, g_MemorySize, MV_MIRROR_PREVIOUS | MV_IS_PRIMARY_RAM},
|
||||||
|
|
||||||
// TODO: There are a few swizzled mirrors of VRAM, not sure about the best way to
|
// TODO: There are a few swizzled mirrors of VRAM, not sure about the best way to
|
||||||
// implement those.
|
// implement those.
|
||||||
};*/
|
};*/
|
||||||
|
|
||||||
static const int kNumMemViews = sizeof(g_views) / sizeof(MemoryView); ///< Number of mem views
|
static const int kNumMemViews = sizeof(g_views) / sizeof(MemoryView); ///< Number of mem views
|
||||||
|
|
||||||
void Init() {
|
void Init() {
|
||||||
int flags = 0;
|
int flags = 0;
|
||||||
|
|
||||||
for (size_t i = 0; i < ARRAY_SIZE(g_views); i++) {
|
for (size_t i = 0; i < ARRAY_SIZE(g_views); i++) {
|
||||||
if (g_views[i].flags & MV_IS_PRIMARY_RAM)
|
if (g_views[i].flags & MV_IS_PRIMARY_RAM)
|
||||||
g_views[i].size = MEM_FCRAM_SIZE;
|
g_views[i].size = MEM_FCRAM_SIZE;
|
||||||
}
|
}
|
||||||
|
|
||||||
g_base = MemoryMap_Setup(g_views, kNumMemViews, flags, &g_arena);
|
g_base = MemoryMap_Setup(g_views, kNumMemViews, flags, &g_arena);
|
||||||
|
|
||||||
NOTICE_LOG(MEMMAP, "Memory system initialized. RAM at %p (mirror at 0 @ %p)", g_fcram,
|
g_scratchpad = new u8[MEM_SCRATCHPAD_SIZE];
|
||||||
g_physical_fcram);
|
|
||||||
|
NOTICE_LOG(MEMMAP, "Memory system initialized. RAM at %p (mirror at 0 @ %p)", g_fcram,
|
||||||
|
g_physical_fcram);
|
||||||
}
|
}
|
||||||
|
|
||||||
void Shutdown() {
|
void Shutdown() {
|
||||||
u32 flags = 0;
|
u32 flags = 0;
|
||||||
MemoryMap_Shutdown(g_views, kNumMemViews, flags, &g_arena);
|
MemoryMap_Shutdown(g_views, kNumMemViews, flags, &g_arena);
|
||||||
g_arena.ReleaseSpace();
|
|
||||||
g_base = NULL;
|
g_arena.ReleaseSpace();
|
||||||
NOTICE_LOG(MEMMAP, "Memory system shut down.");
|
delete[] g_scratchpad;
|
||||||
|
|
||||||
|
g_base = NULL;
|
||||||
|
g_scratchpad = NULL;
|
||||||
|
|
||||||
|
NOTICE_LOG(MEMMAP, "Memory system shut down.");
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -29,157 +29,156 @@
|
||||||
namespace Memory {
|
namespace Memory {
|
||||||
|
|
||||||
template <typename T>
|
template <typename T>
|
||||||
inline void ReadFromHardware(T &var, const u32 addr)
|
inline void ReadFromHardware(T &var, const u32 addr) {
|
||||||
{
|
// TODO: Figure out the fastest order of tests for both read and write (they are probably different).
|
||||||
// TODO: Figure out the fastest order of tests for both read and write (they are probably different).
|
// TODO: Make sure this represents the mirrors in a correct way.
|
||||||
// TODO: Make sure this represents the mirrors in a correct way.
|
|
||||||
|
|
||||||
// Could just do a base-relative read, too.... TODO
|
// Could just do a base-relative read, too.... TODO
|
||||||
|
|
||||||
if ((addr & 0x3E000000) == 0x08000000) {
|
if ((addr & 0x3E000000) == 0x08000000) {
|
||||||
var = *((const T*)&g_fcram[addr & MEM_FCRAM_MASK]);
|
var = *((const T*)&g_fcram[addr & MEM_FCRAM_MASK]);
|
||||||
|
|
||||||
// Scratchpad memory
|
// Scratchpad memory
|
||||||
} else if (addr > MEM_SCRATCHPAD_VADDR && addr <= (MEM_SCRATCHPAD_VADDR + MEM_SCRATCHPAD_SIZE)) {
|
} else if (addr > MEM_SCRATCHPAD_VADDR && addr <= (MEM_SCRATCHPAD_VADDR + MEM_SCRATCHPAD_SIZE)) {
|
||||||
var = *((const T*)&g_scratchpad[addr & MEM_SCRATCHPAD_MASK]);
|
var = *((const T*)&g_scratchpad[addr & MEM_SCRATCHPAD_MASK]);
|
||||||
}
|
}
|
||||||
/*else if ((addr & 0x3F800000) == 0x04000000) {
|
/*else if ((addr & 0x3F800000) == 0x04000000) {
|
||||||
var = *((const T*)&m_pVRAM[addr & VRAM_MASK]);
|
var = *((const T*)&m_pVRAM[addr & VRAM_MASK]);
|
||||||
}*/
|
}*/
|
||||||
else {
|
else {
|
||||||
_assert_msg_(MEMMAP, false, "unknown hardware read");
|
_assert_msg_(MEMMAP, false, "unknown hardware read");
|
||||||
// WARN_LOG(MEMMAP, "ReadFromHardware: Invalid addr %08x PC %08x LR %08x", addr, currentMIPS->pc, currentMIPS->r[MIPS_REG_RA]);
|
// WARN_LOG(MEMMAP, "ReadFromHardware: Invalid addr %08x PC %08x LR %08x", addr, currentMIPS->pc, currentMIPS->r[MIPS_REG_RA]);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
template <typename T>
|
template <typename T>
|
||||||
inline void WriteToHardware(u32 addr, const T data) {
|
inline void WriteToHardware(u32 addr, const T data) {
|
||||||
NOTICE_LOG(MEMMAP, "Test1 %08X", addr);
|
NOTICE_LOG(MEMMAP, "Test1 %08X", addr);
|
||||||
// ExeFS:/.code is loaded here:
|
// ExeFS:/.code is loaded here:
|
||||||
if ((addr & 0xFFF00000) == 0x00100000) {
|
if ((addr & 0xFFF00000) == 0x00100000) {
|
||||||
// TODO(ShizZy): This is dumb... handle correctly. From 3DBrew:
|
// TODO(ShizZy): This is dumb... handle correctly. From 3DBrew:
|
||||||
// http://3dbrew.org/wiki/Memory_layout#ARM11_User-land_memory_regions
|
// http://3dbrew.org/wiki/Memory_layout#ARM11_User-land_memory_regions
|
||||||
// The ExeFS:/.code is loaded here, executables must be loaded to the 0x00100000 region when
|
// The ExeFS:/.code is loaded here, executables must be loaded to the 0x00100000 region when
|
||||||
// the exheader "special memory" flag is clear. The 0x03F00000-byte size restriction only
|
// the exheader "special memory" flag is clear. The 0x03F00000-byte size restriction only
|
||||||
// applies when this flag is clear. Executables are usually loaded to 0x14000000 when the
|
// applies when this flag is clear. Executables are usually loaded to 0x14000000 when the
|
||||||
// exheader "special memory" flag is set, however this address can be arbitrary.
|
// exheader "special memory" flag is set, however this address can be arbitrary.
|
||||||
*(T*)&g_fcram[addr & MEM_FCRAM_MASK] = data;
|
*(T*)&g_fcram[addr & MEM_FCRAM_MASK] = data;
|
||||||
NOTICE_LOG(MEMMAP, "Test2");
|
NOTICE_LOG(MEMMAP, "Test2");
|
||||||
|
|
||||||
// Scratchpad memory
|
// Scratchpad memory
|
||||||
} else if (addr > MEM_SCRATCHPAD_VADDR && addr <= (MEM_SCRATCHPAD_VADDR + MEM_SCRATCHPAD_SIZE)) {
|
} else if (addr > MEM_SCRATCHPAD_VADDR && addr <= (MEM_SCRATCHPAD_VADDR + MEM_SCRATCHPAD_SIZE)) {
|
||||||
*(T*)&g_scratchpad[addr & MEM_SCRATCHPAD_MASK] = data;
|
*(T*)&g_scratchpad[addr & MEM_SCRATCHPAD_MASK] = data;
|
||||||
|
|
||||||
// Heap mapped by ControlMemory:
|
// Heap mapped by ControlMemory:
|
||||||
} else if ((addr & 0x3E000000) == 0x08000000) {
|
} else if ((addr & 0x3E000000) == 0x08000000) {
|
||||||
// TODO(ShizZy): Writes to this virtual address should be put in physical memory at FCRAM + GSP
|
// TODO(ShizZy): Writes to this virtual address should be put in physical memory at FCRAM + GSP
|
||||||
// heap size... the following is writing to FCRAM + 0, which is actually supposed to be the
|
// heap size... the following is writing to FCRAM + 0, which is actually supposed to be the
|
||||||
// application's GSP heap
|
// application's GSP heap
|
||||||
*(T*)&g_fcram[addr & MEM_FCRAM_MASK] = data;
|
*(T*)&g_fcram[addr & MEM_FCRAM_MASK] = data;
|
||||||
} else if ((addr & 0xFF000000) == 0x14000000) {
|
} else if ((addr & 0xFF000000) == 0x14000000) {
|
||||||
_assert_msg_(MEMMAP, false, "umimplemented write to GSP heap");
|
_assert_msg_(MEMMAP, false, "umimplemented write to GSP heap");
|
||||||
} else if ((addr & 0xFFF00000) == 0x1EC00000) {
|
} else if ((addr & 0xFFF00000) == 0x1EC00000) {
|
||||||
_assert_msg_(MEMMAP, false, "umimplemented write to IO registers");
|
_assert_msg_(MEMMAP, false, "umimplemented write to IO registers");
|
||||||
} else if ((addr & 0xFF000000) == 0x1F000000) {
|
} else if ((addr & 0xFF000000) == 0x1F000000) {
|
||||||
_assert_msg_(MEMMAP, false, "umimplemented write to VRAM");
|
_assert_msg_(MEMMAP, false, "umimplemented write to VRAM");
|
||||||
} else if ((addr & 0xFFF00000) == 0x1FF00000) {
|
} else if ((addr & 0xFFF00000) == 0x1FF00000) {
|
||||||
_assert_msg_(MEMMAP, false, "umimplemented write to DSP memory");
|
_assert_msg_(MEMMAP, false, "umimplemented write to DSP memory");
|
||||||
} else if ((addr & 0xFFFF0000) == 0x1FF80000) {
|
} else if ((addr & 0xFFFF0000) == 0x1FF80000) {
|
||||||
_assert_msg_(MEMMAP, false, "umimplemented write to Configuration Memory");
|
_assert_msg_(MEMMAP, false, "umimplemented write to Configuration Memory");
|
||||||
} else if ((addr & 0xFFFFF000) == 0x1FF81000) {
|
} else if ((addr & 0xFFFFF000) == 0x1FF81000) {
|
||||||
_assert_msg_(MEMMAP, false, "umimplemented write to shared page");
|
_assert_msg_(MEMMAP, false, "umimplemented write to shared page");
|
||||||
} else {
|
} else {
|
||||||
_assert_msg_(MEMMAP, false, "unknown hardware write");
|
_assert_msg_(MEMMAP, false, "unknown hardware write");
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
bool IsValidAddress(const u32 addr) {
|
bool IsValidAddress(const u32 addr) {
|
||||||
if ((addr & 0x3E000000) == 0x08000000) {
|
if ((addr & 0x3E000000) == 0x08000000) {
|
||||||
return true;
|
return true;
|
||||||
} else if ((addr & 0x3F800000) == 0x04000000) {
|
} else if ((addr & 0x3F800000) == 0x04000000) {
|
||||||
return true;
|
return true;
|
||||||
} else if ((addr & 0xBFFF0000) == 0x00010000) {
|
} else if ((addr & 0xBFFF0000) == 0x00010000) {
|
||||||
return true;
|
return true;
|
||||||
} else if ((addr & 0x3F000000) >= 0x08000000 && (addr & 0x3F000000) < 0x08000000 + MEM_FCRAM_MASK) {
|
} else if ((addr & 0x3F000000) >= 0x08000000 && (addr & 0x3F000000) < 0x08000000 + MEM_FCRAM_MASK) {
|
||||||
return true;
|
return true;
|
||||||
} else {
|
} else {
|
||||||
return false;
|
return false;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
u8 *GetPointer(const u32 addr) {
|
u8 *GetPointer(const u32 addr) {
|
||||||
// TODO(bunnei): Just a stub for now... ImplementMe!
|
// TODO(bunnei): Just a stub for now... ImplementMe!
|
||||||
if ((addr & 0x3E000000) == 0x08000000) {
|
if ((addr & 0x3E000000) == 0x08000000) {
|
||||||
return g_fcram + (addr & MEM_FCRAM_MASK);
|
return g_fcram + (addr & MEM_FCRAM_MASK);
|
||||||
}
|
}
|
||||||
//else if ((addr & 0x3F800000) == 0x04000000) {
|
//else if ((addr & 0x3F800000) == 0x04000000) {
|
||||||
// return g_vram + (addr & MEM_VRAM_MASK);
|
// return g_vram + (addr & MEM_VRAM_MASK);
|
||||||
//}
|
//}
|
||||||
//else if ((addr & 0x3F000000) >= 0x08000000 && (addr & 0x3F000000) < 0x08000000 + g_MemorySize) {
|
//else if ((addr & 0x3F000000) >= 0x08000000 && (addr & 0x3F000000) < 0x08000000 + g_MemorySize) {
|
||||||
// return m_pRAM + (addr & g_MemoryMask);
|
// return m_pRAM + (addr & g_MemoryMask);
|
||||||
//}
|
//}
|
||||||
else {
|
else {
|
||||||
//ERROR_LOG(MEMMAP, "Unknown GetPointer %08x PC %08x LR %08x", addr, currentMIPS->pc, currentMIPS->r[MIPS_REG_RA]);
|
//ERROR_LOG(MEMMAP, "Unknown GetPointer %08x PC %08x LR %08x", addr, currentMIPS->pc, currentMIPS->r[MIPS_REG_RA]);
|
||||||
ERROR_LOG(MEMMAP, "Unknown GetPointer %08x", addr);
|
ERROR_LOG(MEMMAP, "Unknown GetPointer %08x", addr);
|
||||||
static bool reported = false;
|
static bool reported = false;
|
||||||
//if (!reported) {
|
//if (!reported) {
|
||||||
// Reporting::ReportMessage("Unknown GetPointer %08x PC %08x LR %08x", addr, currentMIPS->pc, currentMIPS->r[MIPS_REG_RA]);
|
// Reporting::ReportMessage("Unknown GetPointer %08x PC %08x LR %08x", addr, currentMIPS->pc, currentMIPS->r[MIPS_REG_RA]);
|
||||||
// reported = true;
|
// reported = true;
|
||||||
//}
|
//}
|
||||||
//if (!g_Config.bIgnoreBadMemAccess) {
|
//if (!g_Config.bIgnoreBadMemAccess) {
|
||||||
// Core_EnableStepping(true);
|
// Core_EnableStepping(true);
|
||||||
// host->SetDebugMode(true);
|
// host->SetDebugMode(true);
|
||||||
//}
|
//}
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
u8 Read8(const u32 addr) {
|
u8 Read8(const u32 addr) {
|
||||||
u8 _var = 0;
|
u8 _var = 0;
|
||||||
ReadFromHardware<u8>(_var, addr);
|
ReadFromHardware<u8>(_var, addr);
|
||||||
return (u8)_var;
|
return (u8)_var;
|
||||||
}
|
}
|
||||||
|
|
||||||
u16 Read16(const u32 addr) {
|
u16 Read16(const u32 addr) {
|
||||||
u16_le _var = 0;
|
u16_le _var = 0;
|
||||||
ReadFromHardware<u16_le>(_var, addr);
|
ReadFromHardware<u16_le>(_var, addr);
|
||||||
return (u16)_var;
|
return (u16)_var;
|
||||||
}
|
}
|
||||||
|
|
||||||
u32 Read32(const u32 addr) {
|
u32 Read32(const u32 addr) {
|
||||||
u32_le _var = 0;
|
u32_le _var = 0;
|
||||||
ReadFromHardware<u32_le>(_var, addr);
|
ReadFromHardware<u32_le>(_var, addr);
|
||||||
return _var;
|
return _var;
|
||||||
}
|
}
|
||||||
|
|
||||||
u64 Read64(const u32 addr) {
|
u64 Read64(const u32 addr) {
|
||||||
u64_le _var = 0;
|
u64_le _var = 0;
|
||||||
ReadFromHardware<u64_le>(_var, addr);
|
ReadFromHardware<u64_le>(_var, addr);
|
||||||
return _var;
|
return _var;
|
||||||
}
|
}
|
||||||
|
|
||||||
u32 Read8_ZX(const u32 addr) {
|
u32 Read8_ZX(const u32 addr) {
|
||||||
return (u32)Read8(addr);
|
return (u32)Read8(addr);
|
||||||
}
|
}
|
||||||
|
|
||||||
u32 Read16_ZX(const u32 addr) {
|
u32 Read16_ZX(const u32 addr) {
|
||||||
return (u32)Read16(addr);
|
return (u32)Read16(addr);
|
||||||
}
|
}
|
||||||
|
|
||||||
void Write8(const u32 addr, const u8 data) {
|
void Write8(const u32 addr, const u8 data) {
|
||||||
WriteToHardware<u8>(addr, data);
|
WriteToHardware<u8>(addr, data);
|
||||||
}
|
}
|
||||||
|
|
||||||
void Write16(const u32 addr, const u16 data) {
|
void Write16(const u32 addr, const u16 data) {
|
||||||
WriteToHardware<u16_le>(addr, data);
|
WriteToHardware<u16_le>(addr, data);
|
||||||
}
|
}
|
||||||
|
|
||||||
void Write32(const u32 addr, const u32 data) {
|
void Write32(const u32 addr, const u32 data) {
|
||||||
WriteToHardware<u32_le>(addr, data);
|
WriteToHardware<u32_le>(addr, data);
|
||||||
}
|
}
|
||||||
|
|
||||||
void Write64(const u32 addr, const u64 data) {
|
void Write64(const u32 addr, const u64 data) {
|
||||||
WriteToHardware<u64_le>(addr, data);
|
WriteToHardware<u64_le>(addr, data);
|
||||||
}
|
}
|
||||||
|
|
||||||
} // namespace
|
} // namespace
|
||||||
|
|
|
||||||
Loading…
Reference in a new issue