Mirrors/yuzu-fork
1
0
Fork 0
mirror of https://github.com/yuzu-mirror/yuzu.git synced 2024-11-09 16:29:59 +00:00
Code Issues Projects Releases Packages Wiki Activity

gl_rasterizer_cache: Track texture depth.

Browse source
This commit is contained in:
bunnei 2018-09-04 22:00:24 -04:00
parent 9dccf7e1fa
commit ce8291f6c5
3 changed files with 15 additions and 4 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

4
src/video_core/renderer_opengl/gl_rasterizer_cache.cpp
View file

@ -51,6 +51,7 @@ static VAddr TryGetCpuAddr(Tegra::GPUVAddr gpu_addr) {
params.type = GetFormatType(params.pixel_format); params.type = GetFormatType(params.pixel_format);
params.width = Common::AlignUp(config.tic.Width(), GetCompressionFactor(params.pixel_format)); params.width = Common::AlignUp(config.tic.Width(), GetCompressionFactor(params.pixel_format));
params.height = Common::AlignUp(config.tic.Height(), GetCompressionFactor(params.pixel_format)); params.height = Common::AlignUp(config.tic.Height(), GetCompressionFactor(params.pixel_format));
params.depth = config.tic.Depth();
params.unaligned_height = config.tic.Height(); params.unaligned_height = config.tic.Height();
params.size_in_bytes = params.SizeInBytes(); params.size_in_bytes = params.SizeInBytes();
params.cache_width = Common::AlignUp(params.width, 16); params.cache_width = Common::AlignUp(params.width, 16);
@ -70,6 +71,7 @@ static VAddr TryGetCpuAddr(Tegra::GPUVAddr gpu_addr) {
params.type = GetFormatType(params.pixel_format); params.type = GetFormatType(params.pixel_format);
params.width = config.width; params.width = config.width;
params.height = config.height; params.height = config.height;
params.depth = 1;
params.unaligned_height = config.height; params.unaligned_height = config.height;
params.size_in_bytes = params.SizeInBytes(); params.size_in_bytes = params.SizeInBytes();
params.cache_width = Common::AlignUp(params.width, 16); params.cache_width = Common::AlignUp(params.width, 16);
@ -88,9 +90,9 @@ static VAddr TryGetCpuAddr(Tegra::GPUVAddr gpu_addr) {
params.pixel_format = PixelFormatFromDepthFormat(format); params.pixel_format = PixelFormatFromDepthFormat(format);
params.component_type = ComponentTypeFromDepthFormat(format); params.component_type = ComponentTypeFromDepthFormat(format);
params.type = GetFormatType(params.pixel_format); params.type = GetFormatType(params.pixel_format);
params.size_in_bytes = params.SizeInBytes();
params.width = zeta_width; params.width = zeta_width;
params.height = zeta_height; params.height = zeta_height;
params.depth = 1;
params.unaligned_height = zeta_height; params.unaligned_height = zeta_height;
params.size_in_bytes = params.SizeInBytes(); params.size_in_bytes = params.SizeInBytes();
params.cache_width = Common::AlignUp(params.width, 16); params.cache_width = Common::AlignUp(params.width, 16);

3
src/video_core/renderer_opengl/gl_rasterizer_cache.h
View file

@ -662,7 +662,7 @@ struct SurfaceParams {
ASSERT(width % compression_factor == 0); ASSERT(width % compression_factor == 0);
ASSERT(height % compression_factor == 0); ASSERT(height % compression_factor == 0);
return (width / compression_factor) * (height / compression_factor) * return (width / compression_factor) * (height / compression_factor) *
GetFormatBpp(pixel_format) / CHAR_BIT; GetFormatBpp(pixel_format) * depth / CHAR_BIT;
} }
/// Creates SurfaceParams from a texture configuration /// Creates SurfaceParams from a texture configuration
@ -691,6 +691,7 @@ struct SurfaceParams {
SurfaceType type; SurfaceType type;
u32 width; u32 width;
u32 height; u32 height;
u32 depth;
u32 unaligned_height; u32 unaligned_height;
size_t size_in_bytes; size_t size_in_bytes;
SurfaceTarget target; SurfaceTarget target;

12
src/video_core/textures/texture.h
View file

@ -170,8 +170,12 @@ struct TICEntry {
BitField<0, 16, u32> width_minus_1; BitField<0, 16, u32> width_minus_1;
BitField<23, 4, TextureType> texture_type; BitField<23, 4, TextureType> texture_type;
}; };
u16 height_minus_1; union {
INSERT_PADDING_BYTES(10); BitField<0, 16, u32> height_minus_1;
BitField<16, 15, u32> depth_minus_1;
};
INSERT_PADDING_BYTES(8);
GPUVAddr Address() const { GPUVAddr Address() const {
return static_cast<GPUVAddr>((static_cast<GPUVAddr>(address_high) << 32) | address_low); return static_cast<GPUVAddr>((static_cast<GPUVAddr>(address_high) << 32) | address_low);
@ -192,6 +196,10 @@ struct TICEntry {
return height_minus_1 + 1; return height_minus_1 + 1;
} }
u32 Depth() const {
return depth_minus_1 + 1;
}
u32 BlockHeight() const { u32 BlockHeight() const {
ASSERT(header_version == TICHeaderVersion::BlockLinear || ASSERT(header_version == TICHeaderVersion::BlockLinear ||
header_version == TICHeaderVersion::BlockLinearColorKey); header_version == TICHeaderVersion::BlockLinearColorKey);