Merge pull request #559 from lioncash/clean

arm: Some cleanup. Also fixed the initial ARM mode that is emulated.
This commit is contained in:
bunnei 2015-02-11 12:02:35 -05:00
commit c51b23b052
4 changed files with 39 additions and 23 deletions

View file

@ -23,7 +23,7 @@ ARM_DynCom::ARM_DynCom() {
ARMul_NewState((ARMul_State*)state.get()); ARMul_NewState((ARMul_State*)state.get());
state->abort_model = 0; state->abort_model = ABORT_BASE_RESTORED;
state->cpu = (cpu_config_t*)&s_arm11_cpu_info; state->cpu = (cpu_config_t*)&s_arm11_cpu_info;
state->bigendSig = LOW; state->bigendSig = LOW;
@ -34,7 +34,7 @@ ARM_DynCom::ARM_DynCom() {
ARMul_CoProInit(state.get()); ARMul_CoProInit(state.get());
ARMul_Reset(state.get()); ARMul_Reset(state.get());
state->NextInstr = RESUME; // NOTE: This will be overwritten by LoadContext state->NextInstr = RESUME; // NOTE: This will be overwritten by LoadContext
state->Emulate = 3; state->Emulate = RUN;
state->Reg[15] = 0x00000000; state->Reg[15] = 0x00000000;
state->Reg[13] = 0x10000000; // Set stack pointer to the top of the stack state->Reg[13] = 0x10000000; // Set stack pointer to the top of the stack

View file

@ -74,7 +74,7 @@ ARMul_State* ARMul_NewState(ARMul_State* state)
for (unsigned int i = 0; i < 7; i++) for (unsigned int i = 0; i < 7; i++)
state->Spsr[i] = 0; state->Spsr[i] = 0;
state->Mode = 0; state->Mode = USER32MODE;
state->VectorCatch = 0; state->VectorCatch = 0;
state->Aborted = false; state->Aborted = false;

View file

@ -35,15 +35,27 @@
#define BITS(s, a, b) ((s << ((sizeof(s) * 8 - 1) - b)) >> (sizeof(s) * 8 - b + a - 1)) #define BITS(s, a, b) ((s << ((sizeof(s) * 8 - 1) - b)) >> (sizeof(s) * 8 - b + a - 1))
#define BIT(s, n) ((s >> (n)) & 1) #define BIT(s, n) ((s >> (n)) & 1)
#define LOW 0 // Signal levels
#define HIGH 1 enum {
#define LOWHIGH 1 LOW = 0,
#define HIGHLOW 2 HIGH = 1,
LOWHIGH = 1,
HIGHLOW = 2
};
//the define of cachetype // Cache types
#define NONCACHE 0 enum {
#define DATACACHE 1 NONCACHE = 0,
#define INSTCACHE 2 DATACACHE = 1,
INSTCACHE = 2,
};
// Abort models
enum {
ABORT_BASE_RESTORED = 0,
ABORT_EARLY = 1,
ABORT_BASE_UPDATED = 2
};
#define POS(i) ( (~(i)) >> 31 ) #define POS(i) ( (~(i)) >> 31 )
#define NEG(i) ( (i) >> 31 ) #define NEG(i) ( (i) >> 31 )

View file

@ -76,24 +76,28 @@
#define R15MODE (state->Reg[15] & R15MODEBITS) #define R15MODE (state->Reg[15] & R15MODEBITS)
// Different ways to start the next instruction. // Different ways to start the next instruction.
#define SEQ 0 enum {
#define NONSEQ 1 SEQ = 0,
#define PCINCEDSEQ 2 NONSEQ = 1,
#define PCINCEDNONSEQ 3 PCINCEDSEQ = 2,
#define PRIMEPIPE 4 PCINCEDNONSEQ = 3,
#define RESUME 8 PRIMEPIPE = 4,
RESUME = 8
};
// Values for Emulate.
enum {
STOP = 0, // Stop
CHANGEMODE = 1, // Change mode
ONCE = 2, // Execute just one interation
RUN = 3 // Continuous execution
};
#define FLUSHPIPE state->NextInstr |= PRIMEPIPE #define FLUSHPIPE state->NextInstr |= PRIMEPIPE
// Macro to rotate n right by b bits. // Macro to rotate n right by b bits.
#define ROTATER(n, b) (((n) >> (b)) | ((n) << (32 - (b)))) #define ROTATER(n, b) (((n) >> (b)) | ((n) << (32 - (b))))
// Values for Emulate.
#define STOP 0 // stop
#define CHANGEMODE 1 // change mode
#define ONCE 2 // execute just one interation
#define RUN 3 // continuous execution
// Stuff that is shared across modes. // Stuff that is shared across modes.
extern unsigned ARMul_MultTable[]; // Number of I cycles for a mult. extern unsigned ARMul_MultTable[]; // Number of I cycles for a mult.
extern ARMword ARMul_ImmedTable[]; // Immediate DP LHS values. extern ARMword ARMul_ImmedTable[]; // Immediate DP LHS values.