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Merge pull request #2784 from ReinUsesLisp/smem
shader_ir: Implement shared memory
This commit is contained in:
commit
b31880dc5e
5 changed files with 81 additions and 21 deletions
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@ -325,6 +325,7 @@ public:
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DeclareRegisters();
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DeclarePredicates();
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DeclareLocalMemory();
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DeclareSharedMemory();
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DeclareInternalFlags();
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DeclareInputAttributes();
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DeclareOutputAttributes();
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@ -499,6 +500,13 @@ private:
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code.AddNewLine();
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}
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void DeclareSharedMemory() {
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if (stage != ProgramType::Compute) {
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return;
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}
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code.AddLine("shared uint {}[];", GetSharedMemory());
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}
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void DeclareInternalFlags() {
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for (u32 flag = 0; flag < static_cast<u32>(InternalFlag::Amount); flag++) {
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const auto flag_code = static_cast<InternalFlag>(flag);
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@ -881,6 +889,12 @@ private:
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Type::Uint};
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}
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if (const auto smem = std::get_if<SmemNode>(&*node)) {
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return {
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fmt::format("{}[{} >> 2]", GetSharedMemory(), Visit(smem->GetAddress()).AsUint()),
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Type::Uint};
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}
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if (const auto internal_flag = std::get_if<InternalFlagNode>(&*node)) {
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return {GetInternalFlag(internal_flag->GetFlag()), Type::Bool};
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}
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@ -1286,6 +1300,11 @@ private:
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target = {
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fmt::format("{}[{} >> 2]", GetLocalMemory(), Visit(lmem->GetAddress()).AsUint()),
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Type::Uint};
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} else if (const auto smem = std::get_if<SmemNode>(&*dest)) {
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ASSERT(stage == ProgramType::Compute);
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target = {
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fmt::format("{}[{} >> 2]", GetSharedMemory(), Visit(smem->GetAddress()).AsUint()),
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Type::Uint};
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} else if (const auto gmem = std::get_if<GmemNode>(&*dest)) {
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const std::string real = Visit(gmem->GetRealAddress()).AsUint();
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const std::string base = Visit(gmem->GetBaseAddress()).AsUint();
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@ -2175,6 +2194,10 @@ private:
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return "lmem_" + suffix;
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}
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std::string GetSharedMemory() const {
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return fmt::format("smem_{}", suffix);
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}
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std::string GetInternalFlag(InternalFlag flag) const {
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constexpr std::array InternalFlagNames = {"zero_flag", "sign_flag", "carry_flag",
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"overflow_flag"};
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@ -35,7 +35,7 @@ u32 GetUniformTypeElementsCount(Tegra::Shader::UniformType uniform_type) {
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return 1;
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}
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}
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} // namespace
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} // Anonymous namespace
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u32 ShaderIR::DecodeMemory(NodeBlock& bb, u32 pc) {
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const Instruction instr = {program_code[pc]};
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@ -106,16 +106,17 @@ u32 ShaderIR::DecodeMemory(NodeBlock& bb, u32 pc) {
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}
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break;
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}
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case OpCode::Id::LD_L: {
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LOG_DEBUG(HW_GPU, "LD_L cache management mode: {}",
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static_cast<u64>(instr.ld_l.unknown.Value()));
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const auto GetLmem = [&](s32 offset) {
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case OpCode::Id::LD_L:
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LOG_DEBUG(HW_GPU, "LD_L cache management mode: {}", static_cast<u64>(instr.ld_l.unknown));
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[[fallthrough]];
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case OpCode::Id::LD_S: {
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const auto GetMemory = [&](s32 offset) {
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ASSERT(offset % 4 == 0);
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const Node immediate_offset = Immediate(static_cast<s32>(instr.smem_imm) + offset);
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const Node address = Operation(OperationCode::IAdd, NO_PRECISE, GetRegister(instr.gpr8),
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immediate_offset);
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return GetLocalMemory(address);
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return opcode->get().GetId() == OpCode::Id::LD_S ? GetSharedMemory(address)
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: GetLocalMemory(address);
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};
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switch (instr.ldst_sl.type.Value()) {
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@ -135,14 +136,16 @@ u32 ShaderIR::DecodeMemory(NodeBlock& bb, u32 pc) {
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return 0;
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}
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}();
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for (u32 i = 0; i < count; ++i)
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SetTemporary(bb, i, GetLmem(i * 4));
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for (u32 i = 0; i < count; ++i)
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for (u32 i = 0; i < count; ++i) {
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SetTemporary(bb, i, GetMemory(i * 4));
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}
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for (u32 i = 0; i < count; ++i) {
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SetRegister(bb, instr.gpr0.Value() + i, GetTemporary(i));
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}
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break;
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}
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default:
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UNIMPLEMENTED_MSG("LD_L Unhandled type: {}",
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UNIMPLEMENTED_MSG("{} Unhandled type: {}", opcode->get().GetName(),
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static_cast<u32>(instr.ldst_sl.type.Value()));
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}
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break;
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@ -209,27 +212,34 @@ u32 ShaderIR::DecodeMemory(NodeBlock& bb, u32 pc) {
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break;
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}
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case OpCode::Id::ST_L: {
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case OpCode::Id::ST_L:
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LOG_DEBUG(HW_GPU, "ST_L cache management mode: {}",
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static_cast<u64>(instr.st_l.cache_management.Value()));
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const auto GetLmemAddr = [&](s32 offset) {
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[[fallthrough]];
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case OpCode::Id::ST_S: {
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const auto GetAddress = [&](s32 offset) {
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ASSERT(offset % 4 == 0);
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const Node immediate = Immediate(static_cast<s32>(instr.smem_imm) + offset);
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return Operation(OperationCode::IAdd, NO_PRECISE, GetRegister(instr.gpr8), immediate);
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};
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const auto set_memory = opcode->get().GetId() == OpCode::Id::ST_L
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? &ShaderIR::SetLocalMemory
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: &ShaderIR::SetSharedMemory;
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switch (instr.ldst_sl.type.Value()) {
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case Tegra::Shader::StoreType::Bits128:
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SetLocalMemory(bb, GetLmemAddr(12), GetRegister(instr.gpr0.Value() + 3));
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SetLocalMemory(bb, GetLmemAddr(8), GetRegister(instr.gpr0.Value() + 2));
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(this->*set_memory)(bb, GetAddress(12), GetRegister(instr.gpr0.Value() + 3));
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(this->*set_memory)(bb, GetAddress(8), GetRegister(instr.gpr0.Value() + 2));
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[[fallthrough]];
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case Tegra::Shader::StoreType::Bits64:
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SetLocalMemory(bb, GetLmemAddr(4), GetRegister(instr.gpr0.Value() + 1));
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(this->*set_memory)(bb, GetAddress(4), GetRegister(instr.gpr0.Value() + 1));
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[[fallthrough]];
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case Tegra::Shader::StoreType::Bits32:
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SetLocalMemory(bb, GetLmemAddr(0), GetRegister(instr.gpr0));
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(this->*set_memory)(bb, GetAddress(0), GetRegister(instr.gpr0));
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break;
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default:
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UNIMPLEMENTED_MSG("ST_L Unhandled type: {}",
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UNIMPLEMENTED_MSG("{} unhandled type: {}", opcode->get().GetName(),
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static_cast<u32>(instr.ldst_sl.type.Value()));
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}
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break;
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@ -206,12 +206,13 @@ class PredicateNode;
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class AbufNode;
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class CbufNode;
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class LmemNode;
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class SmemNode;
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class GmemNode;
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class CommentNode;
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using NodeData =
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std::variant<OperationNode, ConditionalNode, GprNode, ImmediateNode, InternalFlagNode,
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PredicateNode, AbufNode, CbufNode, LmemNode, GmemNode, CommentNode>;
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PredicateNode, AbufNode, CbufNode, LmemNode, SmemNode, GmemNode, CommentNode>;
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using Node = std::shared_ptr<NodeData>;
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using Node4 = std::array<Node, 4>;
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using NodeBlock = std::vector<Node>;
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@ -583,6 +584,19 @@ private:
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Node address;
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};
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/// Shared memory node
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class SmemNode final {
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public:
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explicit SmemNode(Node address) : address{std::move(address)} {}
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const Node& GetAddress() const {
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return address;
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}
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private:
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Node address;
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};
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/// Global memory node
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class GmemNode final {
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public:
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@ -137,6 +137,10 @@ Node ShaderIR::GetLocalMemory(Node address) {
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return MakeNode<LmemNode>(std::move(address));
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}
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Node ShaderIR::GetSharedMemory(Node address) {
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return MakeNode<SmemNode>(std::move(address));
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}
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Node ShaderIR::GetTemporary(u32 id) {
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return GetRegister(Register::ZeroIndex + 1 + id);
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}
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@ -378,6 +382,11 @@ void ShaderIR::SetLocalMemory(NodeBlock& bb, Node address, Node value) {
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Operation(OperationCode::Assign, GetLocalMemory(std::move(address)), std::move(value)));
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}
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void ShaderIR::SetSharedMemory(NodeBlock& bb, Node address, Node value) {
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bb.push_back(
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Operation(OperationCode::Assign, GetSharedMemory(std::move(address)), std::move(value)));
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}
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void ShaderIR::SetTemporary(NodeBlock& bb, u32 id, Node value) {
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SetRegister(bb, Register::ZeroIndex + 1 + id, std::move(value));
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}
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@ -208,6 +208,8 @@ private:
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Node GetInternalFlag(InternalFlag flag, bool negated = false);
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/// Generates a node representing a local memory address
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Node GetLocalMemory(Node address);
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/// Generates a node representing a shared memory address
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Node GetSharedMemory(Node address);
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/// Generates a temporary, internally it uses a post-RZ register
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Node GetTemporary(u32 id);
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@ -217,8 +219,10 @@ private:
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void SetPredicate(NodeBlock& bb, u64 dest, Node src);
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/// Sets an internal flag. src value must be a bool-evaluated node
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void SetInternalFlag(NodeBlock& bb, InternalFlag flag, Node value);
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/// Sets a local memory address. address and value must be a number-evaluated node
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/// Sets a local memory address with a value.
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void SetLocalMemory(NodeBlock& bb, Node address, Node value);
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/// Sets a shared memory address with a value.
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void SetSharedMemory(NodeBlock& bb, Node address, Node value);
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/// Sets a temporary. Internally it uses a post-RZ register
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void SetTemporary(NodeBlock& bb, u32 id, Node value);
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