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macro_jit_x64: Should not skip zero registers for certain ALU ops
The code generated for these ALU ops assume src_a and src_b are always valid.
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1 changed files with 3 additions and 1 deletions
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@ -56,11 +56,13 @@ void MacroJITx64Impl::Compile_ALU(Macro::Opcode opcode) {
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const bool valid_operation = !is_a_zero && !is_b_zero;
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const bool is_move_operation = !is_a_zero && is_b_zero;
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const bool has_zero_register = is_a_zero || is_b_zero;
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const bool no_zero_reg_skip = opcode.alu_operation == Macro::ALUOperation::AddWithCarry ||
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opcode.alu_operation == Macro::ALUOperation::SubtractWithBorrow;
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Xbyak::Reg32 src_a;
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Xbyak::Reg32 src_b;
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if (!optimizer.zero_reg_skip) {
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if (!optimizer.zero_reg_skip || no_zero_reg_skip) {
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src_a = Compile_GetRegister(opcode.src_a, RESULT);
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src_b = Compile_GetRegister(opcode.src_b, eax);
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} else {
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