Merge pull request #12403 from liamwhite/clipdistance

shader_recompiler: use minimal clip distance array
This commit is contained in:
Fernando S 2023-12-20 18:45:20 +01:00 committed by GitHub
commit 9e5b4052ed
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GPG key ID: 4AEE18F83AFDEB23
8 changed files with 22 additions and 2 deletions

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@ -74,6 +74,11 @@ std::optional<OutAttr> OutputAttrPointer(EmitContext& ctx, IR::Attribute attr) {
case IR::Attribute::ClipDistance7: { case IR::Attribute::ClipDistance7: {
const u32 base{static_cast<u32>(IR::Attribute::ClipDistance0)}; const u32 base{static_cast<u32>(IR::Attribute::ClipDistance0)};
const u32 index{static_cast<u32>(attr) - base}; const u32 index{static_cast<u32>(attr) - base};
if (index >= ctx.profile.max_user_clip_distances) {
LOG_WARNING(Shader, "Ignoring clip distance store {} >= {} supported", index,
ctx.profile.max_user_clip_distances);
return std::nullopt;
}
const Id clip_num{ctx.Const(index)}; const Id clip_num{ctx.Const(index)};
return OutputAccessChain(ctx, ctx.output_f32, ctx.clip_distances, clip_num); return OutputAccessChain(ctx, ctx.output_f32, ctx.clip_distances, clip_num);
} }

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@ -1528,7 +1528,8 @@ void EmitContext::DefineOutputs(const IR::Program& program) {
if (stage == Stage::Fragment) { if (stage == Stage::Fragment) {
throw NotImplementedException("Storing ClipDistance in fragment stage"); throw NotImplementedException("Storing ClipDistance in fragment stage");
} }
const Id type{TypeArray(F32[1], Const(8U))}; const Id type{TypeArray(
F32[1], Const(std::min(info.used_clip_distances, profile.max_user_clip_distances)))};
clip_distances = DefineOutput(*this, type, invocations, spv::BuiltIn::ClipDistance); clip_distances = DefineOutput(*this, type, invocations, spv::BuiltIn::ClipDistance);
} }
if (info.stores[IR::Attribute::Layer] && if (info.stores[IR::Attribute::Layer] &&

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@ -913,7 +913,11 @@ void GatherInfoFromHeader(Environment& env, Info& info) {
} }
for (size_t index = 0; index < 8; ++index) { for (size_t index = 0; index < 8; ++index) {
const u16 mask{header.vtg.omap_systemc.clip_distances}; const u16 mask{header.vtg.omap_systemc.clip_distances};
info.stores.Set(IR::Attribute::ClipDistance0 + index, ((mask >> index) & 1) != 0); const bool used{((mask >> index) & 1) != 0};
info.stores.Set(IR::Attribute::ClipDistance0 + index, used);
if (used) {
info.used_clip_distances = static_cast<u32>(index) + 1;
}
} }
info.stores.Set(IR::Attribute::PrimitiveId, info.stores.Set(IR::Attribute::PrimitiveId,
header.vtg.omap_systemb.primitive_array_id != 0); header.vtg.omap_systemb.primitive_array_id != 0);

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@ -87,6 +87,8 @@ struct Profile {
bool has_broken_robust{}; bool has_broken_robust{};
u64 min_ssbo_alignment{}; u64 min_ssbo_alignment{};
u32 max_user_clip_distances{};
}; };
} // namespace Shader } // namespace Shader

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@ -227,6 +227,8 @@ struct Info {
bool requires_layer_emulation{}; bool requires_layer_emulation{};
IR::Attribute emulated_layer{}; IR::Attribute emulated_layer{};
u32 used_clip_distances{};
boost::container::static_vector<ConstantBufferDescriptor, MAX_CBUFS> boost::container::static_vector<ConstantBufferDescriptor, MAX_CBUFS>
constant_buffer_descriptors; constant_buffer_descriptors;
boost::container::static_vector<StorageBufferDescriptor, MAX_SSBOS> storage_buffers_descriptors; boost::container::static_vector<StorageBufferDescriptor, MAX_SSBOS> storage_buffers_descriptors;

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@ -233,6 +233,7 @@ ShaderCache::ShaderCache(RasterizerOpenGL& rasterizer_, Core::Frontend::EmuWindo
.ignore_nan_fp_comparisons = true, .ignore_nan_fp_comparisons = true,
.gl_max_compute_smem_size = device.GetMaxComputeSharedMemorySize(), .gl_max_compute_smem_size = device.GetMaxComputeSharedMemorySize(),
.min_ssbo_alignment = device.GetShaderStorageBufferAlignment(), .min_ssbo_alignment = device.GetShaderStorageBufferAlignment(),
.max_user_clip_distances = 8,
}, },
host_info{ host_info{
.support_float64 = true, .support_float64 = true,

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@ -374,6 +374,7 @@ PipelineCache::PipelineCache(RasterizerVulkan& rasterizer_, const Device& device
.has_broken_robust = .has_broken_robust =
device.IsNvidia() && device.GetNvidiaArch() <= NvidiaArchitecture::Arch_Pascal, device.IsNvidia() && device.GetNvidiaArch() <= NvidiaArchitecture::Arch_Pascal,
.min_ssbo_alignment = device.GetStorageBufferAlignment(), .min_ssbo_alignment = device.GetStorageBufferAlignment(),
.max_user_clip_distances = device.GetMaxUserClipDistances(),
}; };
host_info = Shader::HostTranslateInfo{ host_info = Shader::HostTranslateInfo{

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@ -665,6 +665,10 @@ public:
return properties.properties.limits.maxViewports; return properties.properties.limits.maxViewports;
} }
u32 GetMaxUserClipDistances() const {
return properties.properties.limits.maxClipDistances;
}
bool SupportsConditionalBarriers() const { bool SupportsConditionalBarriers() const {
return supports_conditional_barriers; return supports_conditional_barriers;
} }