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Revert "Revert #2466" and stub FirmwareCall 4

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This commit is contained in:
ReinUsesLisp 2019-08-31 17:43:19 -03:00
parent 922c7f4e51
commit 5f309b88db
3 changed files with 19 additions and 4 deletions
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11
src/video_core/engines/maxwell_3d.cpp
View file

@ -328,6 +328,10 @@ void Maxwell3D::CallMethod(const GPU::MethodCall& method_call) {
ProcessMacroBind(method_call.argument); ProcessMacroBind(method_call.argument);
break; break;
} }
case MAXWELL3D_REG_INDEX(firmware[4]): {
ProcessFirmwareCall4();
break;
}
case MAXWELL3D_REG_INDEX(const_buffer.cb_data[0]): case MAXWELL3D_REG_INDEX(const_buffer.cb_data[0]):
case MAXWELL3D_REG_INDEX(const_buffer.cb_data[1]): case MAXWELL3D_REG_INDEX(const_buffer.cb_data[1]):
case MAXWELL3D_REG_INDEX(const_buffer.cb_data[2]): case MAXWELL3D_REG_INDEX(const_buffer.cb_data[2]):
@ -418,6 +422,13 @@ void Maxwell3D::ProcessMacroBind(u32 data) {
macro_positions[regs.macros.entry++] = data; macro_positions[regs.macros.entry++] = data;
} }
void Maxwell3D::ProcessFirmwareCall4() {
LOG_WARNING(HW_GPU, "(STUBBED) called");
// For details refer to #2501
regs.reg_array[0xd00] = 1;
}
void Maxwell3D::ProcessQueryGet() { void Maxwell3D::ProcessQueryGet() {
const GPUVAddr sequence_address{regs.query.QueryAddress()}; const GPUVAddr sequence_address{regs.query.QueryAddress()};
// Since the sequence address is given as a GPU VAddr, we have to convert it to an application // Since the sequence address is given as a GPU VAddr, we have to convert it to an application

8
src/video_core/engines/maxwell_3d.h
View file

@ -1088,7 +1088,9 @@ public:
INSERT_PADDING_WORDS(14); INSERT_PADDING_WORDS(14);
} shader_config[MaxShaderProgram]; } shader_config[MaxShaderProgram];
INSERT_PADDING_WORDS(0x80); INSERT_PADDING_WORDS(0x60);
u32 firmware[0x20];
struct { struct {
u32 cb_size; u32 cb_size;
@ -1317,6 +1319,9 @@ private:
/// Handles writes to the macro bind register. /// Handles writes to the macro bind register.
void ProcessMacroBind(u32 data); void ProcessMacroBind(u32 data);
/// Handles firmware blob 4
void ProcessFirmwareCall4();
/// Handles a write to the CLEAR_BUFFERS register. /// Handles a write to the CLEAR_BUFFERS register.
void ProcessClearBuffers(); void ProcessClearBuffers();
@ -1429,6 +1434,7 @@ ASSERT_REG_POSITION(vertex_array[0], 0x700);
ASSERT_REG_POSITION(independent_blend, 0x780); ASSERT_REG_POSITION(independent_blend, 0x780);
ASSERT_REG_POSITION(vertex_array_limit[0], 0x7C0); ASSERT_REG_POSITION(vertex_array_limit[0], 0x7C0);
ASSERT_REG_POSITION(shader_config[0], 0x800); ASSERT_REG_POSITION(shader_config[0], 0x800);
ASSERT_REG_POSITION(firmware, 0x8C0);
ASSERT_REG_POSITION(const_buffer, 0x8E0); ASSERT_REG_POSITION(const_buffer, 0x8E0);
ASSERT_REG_POSITION(cb_bind[0], 0x904); ASSERT_REG_POSITION(cb_bind[0], 0x904);
ASSERT_REG_POSITION(tex_cb_index, 0x982); ASSERT_REG_POSITION(tex_cb_index, 0x982);

4
src/video_core/macro_interpreter.cpp
View file

@ -124,9 +124,7 @@ bool MacroInterpreter::Step(u32 offset, bool is_delay_slot) {
// An instruction with the Exit flag will not actually // An instruction with the Exit flag will not actually
// cause an exit if it's executed inside a delay slot. // cause an exit if it's executed inside a delay slot.
// TODO(Blinkhawk): Reversed to always exit. The behavior explained above requires further if (opcode.is_exit && !is_delay_slot) {
// testing on the MME code.
if (opcode.is_exit) {
// Exit has a delay slot, execute the next instruction // Exit has a delay slot, execute the next instruction
Step(offset, true); Step(offset, true);
return false; return false;