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scheduler: Clear exclusive state when switching contexts
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6 changed files with 11 additions and 0 deletions
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@ -116,6 +116,8 @@ public:
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*/
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virtual void LoadContext(const ThreadContext& ctx) = 0;
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virtual void ClearExclusiveState() = 0;
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/// Prepare core for thread reschedule (if needed to correctly handle state)
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virtual void PrepareReschedule() = 0;
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};
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@ -226,6 +226,10 @@ void ARM_Dynarmic::ClearInstructionCache() {
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jit->ClearCache();
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}
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void ARM_Dynarmic::ClearExclusiveState() {
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jit->ClearExclusiveState();
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}
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void ARM_Dynarmic::PageTableChanged() {
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jit = MakeJit(cb);
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current_page_table = Memory::GetCurrentPageTable();
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@ -39,6 +39,7 @@ public:
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void LoadContext(const ThreadContext& ctx) override;
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void PrepareReschedule() override;
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void ClearExclusiveState() override;
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void ClearInstructionCache() override;
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void PageTableChanged() override;
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@ -263,6 +263,8 @@ void ARM_Unicorn::PrepareReschedule() {
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CHECKED(uc_emu_stop(uc));
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}
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void ARM_Unicorn::ClearExclusiveState() {}
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void ARM_Unicorn::ClearInstructionCache() {}
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void ARM_Unicorn::RecordBreak(GDBStub::BreakpointAddress bkpt) {
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@ -31,6 +31,7 @@ public:
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void SaveContext(ThreadContext& ctx) override;
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void LoadContext(const ThreadContext& ctx) override;
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void PrepareReschedule() override;
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void ClearExclusiveState() override;
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void ExecuteInstructions(int num_instructions);
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void Run() override;
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void Step() override;
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@ -85,6 +85,7 @@ void Scheduler::SwitchContext(Thread* new_thread) {
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cpu_core->LoadContext(new_thread->context);
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cpu_core->SetTlsAddress(new_thread->GetTLSAddress());
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cpu_core->ClearExclusiveState();
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} else {
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current_thread = nullptr;
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// Note: We do not reset the current process and current page table when idling because
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