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armemu: Join QADD16 and QSUB16 together.
The only difference between these ops is one adds and one subtracts. Everything is literally the same.
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parent
0fd731ee63
commit
49817e89d9
1 changed files with 37 additions and 33 deletions
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@ -5842,40 +5842,44 @@ L_stm_s_takeabort:
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return 1;
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} else printf ("Unhandled v6 insn: sadd/ssub/ssax/sasx\n");
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break;
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case 0x62:
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if ((instr & 0xFF0) == 0xf70) { //QSUB16
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u8 tar = BITS(12, 15);
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u8 src1 = BITS(16, 19);
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u8 src2 = BITS(0, 3);
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s16 a1 = (state->Reg[src1] & 0xFFFF);
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s16 a2 = ((state->Reg[src1] >> 0x10) & 0xFFFF);
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s16 b1 = (state->Reg[src2] & 0xFFFF);
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s16 b2 = ((state->Reg[src2] >> 0x10) & 0xFFFF);
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s32 res1 = (a1 - b1);
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s32 res2 = (a2 - b2);
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if (res1 > 0x7FFF) res1 = 0x7FFF;
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if (res2 > 0x7FFF) res2 = 0x7FFF;
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if (res1 < 0x7FFF) res1 = -0x8000;
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if (res2 < 0x7FFF) res2 = -0x8000;
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state->Reg[tar] = (res1 & 0xFFFF) | ((res2 & 0xFFFF) << 0x10);
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case 0x62: // QSUB16 and QADD16
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if ((instr & 0xFF0) == 0xf70 || (instr & 0xFF0) == 0xf10) {
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const u8 rd_idx = BITS(12, 15);
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const u8 rn_idx = BITS(16, 19);
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const u8 rm_idx = BITS(0, 3);
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const s16 rm_lo = (state->Reg[rm_idx] & 0xFFFF);
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const s16 rm_hi = ((state->Reg[rm_idx] >> 0x10) & 0xFFFF);
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const s16 rn_lo = (state->Reg[rn_idx] & 0xFFFF);
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const s16 rn_hi = ((state->Reg[rn_idx] >> 0x10) & 0xFFFF);
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s32 lo_result;
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s32 hi_result;
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// QSUB16
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if ((instr & 0xFF0) == 0xf70) {
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lo_result = (rn_lo - rm_lo);
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hi_result = (rn_hi - rm_hi);
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}
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else { // QADD16
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lo_result = (rn_lo + rm_lo);
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hi_result = (rn_hi + rm_hi);
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}
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if (lo_result > 0x7FFF)
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lo_result = 0x7FFF;
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else if (lo_result < 0x7FFF)
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lo_result = -0x8000;
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if (hi_result > 0x7FFF)
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hi_result = 0x7FFF;
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else if (hi_result < 0x7FFF)
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hi_result = -0x8000;
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state->Reg[rd_idx] = (lo_result & 0xFFFF) | ((hi_result & 0xFFFF) << 16);
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return 1;
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} else if ((instr & 0xFF0) == 0xf10) { //QADD16
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u8 tar = BITS(12, 15);
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u8 src1 = BITS(16, 19);
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u8 src2 = BITS(0, 3);
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s16 a1 = (state->Reg[src1] & 0xFFFF);
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s16 a2 = ((state->Reg[src1] >> 0x10) & 0xFFFF);
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s16 b1 = (state->Reg[src2] & 0xFFFF);
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s16 b2 = ((state->Reg[src2] >> 0x10) & 0xFFFF);
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s32 res1 = (a1 + b1);
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s32 res2 = (a2 + b2);
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if (res1 > 0x7FFF) res1 = 0x7FFF;
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if (res2 > 0x7FFF) res2 = 0x7FFF;
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if (res1 < 0x7FFF) res1 = -0x8000;
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if (res2 < 0x7FFF) res2 = -0x8000;
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state->Reg[tar] = ((res1) & 0xFFFF) | (((res2) & 0xFFFF) << 0x10);
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return 1;
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} else printf ("Unhandled v6 insn: qadd16/qsub16\n");
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} else {
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printf("Unhandled v6 insn: %08x", BITS(20, 27));
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}
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break;
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case 0x63:
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printf ("Unhandled v6 insn: shadd/shsub\n");
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