Merge pull request #2743 from FernandoS27/surpress-assert

Downgrade and suppress a series of GPU asserts and debug messages.
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bunnei 2019-07-25 12:34:36 -04:00 committed by GitHub
commit 31e8a61527
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9 changed files with 36 additions and 29 deletions

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@ -38,7 +38,7 @@ void MaxwellDMA::CallMethod(const GPU::MethodCall& method_call) {
} }
void MaxwellDMA::HandleCopy() { void MaxwellDMA::HandleCopy() {
LOG_WARNING(HW_GPU, "Requested a DMA copy"); LOG_TRACE(HW_GPU, "Requested a DMA copy");
const GPUVAddr source = regs.src_address.Address(); const GPUVAddr source = regs.src_address.Address();
const GPUVAddr dest = regs.dst_address.Address(); const GPUVAddr dest = regs.dst_address.Address();

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@ -151,12 +151,12 @@ enum class BufferMethods {
NotifyIntr = 0x8, NotifyIntr = 0x8,
WrcacheFlush = 0x9, WrcacheFlush = 0x9,
Unk28 = 0xA, Unk28 = 0xA,
Unk2c = 0xB, UnkCacheFlush = 0xB,
RefCnt = 0x14, RefCnt = 0x14,
SemaphoreAcquire = 0x1A, SemaphoreAcquire = 0x1A,
SemaphoreRelease = 0x1B, SemaphoreRelease = 0x1B,
Unk70 = 0x1C, FenceValue = 0x1C,
Unk74 = 0x1D, FenceAction = 0x1D,
Unk78 = 0x1E, Unk78 = 0x1E,
Unk7c = 0x1F, Unk7c = 0x1F,
Yield = 0x20, Yield = 0x20,
@ -202,6 +202,10 @@ void GPU::CallPullerMethod(const MethodCall& method_call) {
case BufferMethods::SemaphoreAddressLow: case BufferMethods::SemaphoreAddressLow:
case BufferMethods::SemaphoreSequence: case BufferMethods::SemaphoreSequence:
case BufferMethods::RefCnt: case BufferMethods::RefCnt:
case BufferMethods::UnkCacheFlush:
case BufferMethods::WrcacheFlush:
case BufferMethods::FenceValue:
case BufferMethods::FenceAction:
break; break;
case BufferMethods::SemaphoreTrigger: { case BufferMethods::SemaphoreTrigger: {
ProcessSemaphoreTriggerMethod(); ProcessSemaphoreTriggerMethod();
@ -212,21 +216,11 @@ void GPU::CallPullerMethod(const MethodCall& method_call) {
LOG_ERROR(HW_GPU, "Special puller engine method NotifyIntr not implemented"); LOG_ERROR(HW_GPU, "Special puller engine method NotifyIntr not implemented");
break; break;
} }
case BufferMethods::WrcacheFlush: {
// TODO(Kmather73): Research and implement this method.
LOG_ERROR(HW_GPU, "Special puller engine method WrcacheFlush not implemented");
break;
}
case BufferMethods::Unk28: { case BufferMethods::Unk28: {
// TODO(Kmather73): Research and implement this method. // TODO(Kmather73): Research and implement this method.
LOG_ERROR(HW_GPU, "Special puller engine method Unk28 not implemented"); LOG_ERROR(HW_GPU, "Special puller engine method Unk28 not implemented");
break; break;
} }
case BufferMethods::Unk2c: {
// TODO(Kmather73): Research and implement this method.
LOG_ERROR(HW_GPU, "Special puller engine method Unk2c not implemented");
break;
}
case BufferMethods::SemaphoreAcquire: { case BufferMethods::SemaphoreAcquire: {
ProcessSemaphoreAcquire(); ProcessSemaphoreAcquire();
break; break;

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@ -200,7 +200,12 @@ public:
u32 semaphore_acquire; u32 semaphore_acquire;
u32 semaphore_release; u32 semaphore_release;
INSERT_PADDING_WORDS(0xE4); u32 fence_value;
union {
BitField<4, 4, u32> operation;
BitField<8, 8, u32> id;
} fence_action;
INSERT_PADDING_WORDS(0xE2);
// Puller state // Puller state
u32 acquire_mode; u32 acquire_mode;
@ -280,6 +285,8 @@ ASSERT_REG_POSITION(semaphore_trigger, 0x7);
ASSERT_REG_POSITION(reference_count, 0x14); ASSERT_REG_POSITION(reference_count, 0x14);
ASSERT_REG_POSITION(semaphore_acquire, 0x1A); ASSERT_REG_POSITION(semaphore_acquire, 0x1A);
ASSERT_REG_POSITION(semaphore_release, 0x1B); ASSERT_REG_POSITION(semaphore_release, 0x1B);
ASSERT_REG_POSITION(fence_value, 0x1C);
ASSERT_REG_POSITION(fence_action, 0x1D);
ASSERT_REG_POSITION(acquire_mode, 0x100); ASSERT_REG_POSITION(acquire_mode, 0x100);
ASSERT_REG_POSITION(acquire_source, 0x101); ASSERT_REG_POSITION(acquire_source, 0x101);

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@ -137,7 +137,6 @@ constexpr std::array<FormatTuple, VideoCore::Surface::MaxPixelFormat> tex_format
const FormatTuple& GetFormatTuple(PixelFormat pixel_format, ComponentType component_type) { const FormatTuple& GetFormatTuple(PixelFormat pixel_format, ComponentType component_type) {
ASSERT(static_cast<std::size_t>(pixel_format) < tex_format_tuples.size()); ASSERT(static_cast<std::size_t>(pixel_format) < tex_format_tuples.size());
const auto& format{tex_format_tuples[static_cast<std::size_t>(pixel_format)]}; const auto& format{tex_format_tuples[static_cast<std::size_t>(pixel_format)]};
ASSERT(component_type == format.component_type);
return format; return format;
} }

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@ -42,11 +42,14 @@ u32 ShaderIR::DecodeArithmetic(NodeBlock& bb, u32 pc) {
case OpCode::Id::FMUL_R: case OpCode::Id::FMUL_R:
case OpCode::Id::FMUL_IMM: { case OpCode::Id::FMUL_IMM: {
// FMUL does not have 'abs' bits and only the second operand has a 'neg' bit. // FMUL does not have 'abs' bits and only the second operand has a 'neg' bit.
UNIMPLEMENTED_IF_MSG(instr.fmul.tab5cb8_2 != 0, "FMUL tab5cb8_2({}) is not implemented", if (instr.fmul.tab5cb8_2 != 0) {
LOG_WARNING(HW_GPU, "FMUL tab5cb8_2({}) is not implemented",
instr.fmul.tab5cb8_2.Value()); instr.fmul.tab5cb8_2.Value());
UNIMPLEMENTED_IF_MSG( }
instr.fmul.tab5c68_0 != 1, "FMUL tab5cb8_0({}) is not implemented", if (instr.fmul.tab5c68_0 != 1) {
instr.fmul.tab5c68_0.Value()); // SMO typical sends 1 here which seems to be the default LOG_WARNING(HW_GPU, "FMUL tab5cb8_0({}) is not implemented",
instr.fmul.tab5c68_0.Value());
}
op_b = GetOperandAbsNegFloat(op_b, false, instr.fmul.negate_b); op_b = GetOperandAbsNegFloat(op_b, false, instr.fmul.negate_b);

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@ -23,7 +23,9 @@ u32 ShaderIR::DecodeArithmeticHalfImmediate(NodeBlock& bb, u32 pc) {
LOG_WARNING(HW_GPU, "{} FTZ not implemented", opcode->get().GetName()); LOG_WARNING(HW_GPU, "{} FTZ not implemented", opcode->get().GetName());
} }
} else { } else {
UNIMPLEMENTED_IF(instr.alu_half_imm.precision != Tegra::Shader::HalfPrecision::None); if (instr.alu_half_imm.precision != Tegra::Shader::HalfPrecision::None) {
LOG_WARNING(HW_GPU, "{} FTZ not implemented", opcode->get().GetName());
}
} }
Node op_a = UnpackHalfFloat(GetRegister(instr.gpr8), instr.alu_half_imm.type_a); Node op_a = UnpackHalfFloat(GetRegister(instr.gpr8), instr.alu_half_imm.type_a);

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@ -18,10 +18,12 @@ u32 ShaderIR::DecodeFfma(NodeBlock& bb, u32 pc) {
const auto opcode = OpCode::Decode(instr); const auto opcode = OpCode::Decode(instr);
UNIMPLEMENTED_IF_MSG(instr.ffma.cc != 0, "FFMA cc not implemented"); UNIMPLEMENTED_IF_MSG(instr.ffma.cc != 0, "FFMA cc not implemented");
UNIMPLEMENTED_IF_MSG(instr.ffma.tab5980_0 != 1, "FFMA tab5980_0({}) not implemented", if (instr.ffma.tab5980_0 != 1) {
instr.ffma.tab5980_0.Value()); // Seems to be 1 by default based on SMO LOG_WARNING(HW_GPU, "FFMA tab5980_0({}) not implemented", instr.ffma.tab5980_0.Value());
UNIMPLEMENTED_IF_MSG(instr.ffma.tab5980_1 != 0, "FFMA tab5980_1({}) not implemented", }
instr.ffma.tab5980_1.Value()); if (instr.ffma.tab5980_1 != 0) {
LOG_WARNING(HW_GPU, "FFMA tab5980_1({}) not implemented", instr.ffma.tab5980_1.Value());
}
const Node op_a = GetRegister(instr.gpr8); const Node op_a = GetRegister(instr.gpr8);

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@ -18,7 +18,7 @@ u32 ShaderIR::DecodeHalfSetPredicate(NodeBlock& bb, u32 pc) {
const Instruction instr = {program_code[pc]}; const Instruction instr = {program_code[pc]};
const auto opcode = OpCode::Decode(instr); const auto opcode = OpCode::Decode(instr);
UNIMPLEMENTED_IF(instr.hsetp2.ftz != 0); DEBUG_ASSERT(instr.hsetp2.ftz == 0);
Node op_a = UnpackHalfFloat(GetRegister(instr.gpr8), instr.hsetp2.type_a); Node op_a = UnpackHalfFloat(GetRegister(instr.gpr8), instr.hsetp2.type_a);
op_a = GetOperandAbsNegHalf(op_a, instr.hsetp2.abs_a, instr.hsetp2.negate_a); op_a = GetOperandAbsNegHalf(op_a, instr.hsetp2.abs_a, instr.hsetp2.negate_a);

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@ -22,9 +22,9 @@ u32 ShaderIR::DecodeHfma2(NodeBlock& bb, u32 pc) {
const auto opcode = OpCode::Decode(instr); const auto opcode = OpCode::Decode(instr);
if (opcode->get().GetId() == OpCode::Id::HFMA2_RR) { if (opcode->get().GetId() == OpCode::Id::HFMA2_RR) {
UNIMPLEMENTED_IF(instr.hfma2.rr.precision != HalfPrecision::None); DEBUG_ASSERT(instr.hfma2.rr.precision == HalfPrecision::None);
} else { } else {
UNIMPLEMENTED_IF(instr.hfma2.precision != HalfPrecision::None); DEBUG_ASSERT(instr.hfma2.precision == HalfPrecision::None);
} }
constexpr auto identity = HalfType::H0_H1; constexpr auto identity = HalfType::H0_H1;