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Merge pull request #2743 from FernandoS27/surpress-assert
Downgrade and suppress a series of GPU asserts and debug messages.
This commit is contained in:
commit
31e8a61527
9 changed files with 36 additions and 29 deletions
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@ -38,7 +38,7 @@ void MaxwellDMA::CallMethod(const GPU::MethodCall& method_call) {
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}
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}
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void MaxwellDMA::HandleCopy() {
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void MaxwellDMA::HandleCopy() {
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LOG_WARNING(HW_GPU, "Requested a DMA copy");
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LOG_TRACE(HW_GPU, "Requested a DMA copy");
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const GPUVAddr source = regs.src_address.Address();
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const GPUVAddr source = regs.src_address.Address();
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const GPUVAddr dest = regs.dst_address.Address();
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const GPUVAddr dest = regs.dst_address.Address();
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@ -151,12 +151,12 @@ enum class BufferMethods {
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NotifyIntr = 0x8,
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NotifyIntr = 0x8,
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WrcacheFlush = 0x9,
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WrcacheFlush = 0x9,
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Unk28 = 0xA,
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Unk28 = 0xA,
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Unk2c = 0xB,
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UnkCacheFlush = 0xB,
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RefCnt = 0x14,
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RefCnt = 0x14,
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SemaphoreAcquire = 0x1A,
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SemaphoreAcquire = 0x1A,
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SemaphoreRelease = 0x1B,
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SemaphoreRelease = 0x1B,
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Unk70 = 0x1C,
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FenceValue = 0x1C,
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Unk74 = 0x1D,
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FenceAction = 0x1D,
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Unk78 = 0x1E,
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Unk78 = 0x1E,
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Unk7c = 0x1F,
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Unk7c = 0x1F,
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Yield = 0x20,
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Yield = 0x20,
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@ -202,6 +202,10 @@ void GPU::CallPullerMethod(const MethodCall& method_call) {
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case BufferMethods::SemaphoreAddressLow:
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case BufferMethods::SemaphoreAddressLow:
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case BufferMethods::SemaphoreSequence:
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case BufferMethods::SemaphoreSequence:
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case BufferMethods::RefCnt:
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case BufferMethods::RefCnt:
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case BufferMethods::UnkCacheFlush:
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case BufferMethods::WrcacheFlush:
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case BufferMethods::FenceValue:
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case BufferMethods::FenceAction:
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break;
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break;
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case BufferMethods::SemaphoreTrigger: {
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case BufferMethods::SemaphoreTrigger: {
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ProcessSemaphoreTriggerMethod();
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ProcessSemaphoreTriggerMethod();
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@ -212,21 +216,11 @@ void GPU::CallPullerMethod(const MethodCall& method_call) {
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LOG_ERROR(HW_GPU, "Special puller engine method NotifyIntr not implemented");
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LOG_ERROR(HW_GPU, "Special puller engine method NotifyIntr not implemented");
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break;
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break;
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}
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}
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case BufferMethods::WrcacheFlush: {
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// TODO(Kmather73): Research and implement this method.
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LOG_ERROR(HW_GPU, "Special puller engine method WrcacheFlush not implemented");
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break;
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}
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case BufferMethods::Unk28: {
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case BufferMethods::Unk28: {
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// TODO(Kmather73): Research and implement this method.
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// TODO(Kmather73): Research and implement this method.
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LOG_ERROR(HW_GPU, "Special puller engine method Unk28 not implemented");
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LOG_ERROR(HW_GPU, "Special puller engine method Unk28 not implemented");
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break;
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break;
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}
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}
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case BufferMethods::Unk2c: {
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// TODO(Kmather73): Research and implement this method.
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LOG_ERROR(HW_GPU, "Special puller engine method Unk2c not implemented");
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break;
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}
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case BufferMethods::SemaphoreAcquire: {
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case BufferMethods::SemaphoreAcquire: {
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ProcessSemaphoreAcquire();
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ProcessSemaphoreAcquire();
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break;
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break;
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@ -200,7 +200,12 @@ public:
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u32 semaphore_acquire;
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u32 semaphore_acquire;
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u32 semaphore_release;
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u32 semaphore_release;
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INSERT_PADDING_WORDS(0xE4);
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u32 fence_value;
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union {
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BitField<4, 4, u32> operation;
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BitField<8, 8, u32> id;
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} fence_action;
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INSERT_PADDING_WORDS(0xE2);
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// Puller state
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// Puller state
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u32 acquire_mode;
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u32 acquire_mode;
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@ -280,6 +285,8 @@ ASSERT_REG_POSITION(semaphore_trigger, 0x7);
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ASSERT_REG_POSITION(reference_count, 0x14);
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ASSERT_REG_POSITION(reference_count, 0x14);
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ASSERT_REG_POSITION(semaphore_acquire, 0x1A);
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ASSERT_REG_POSITION(semaphore_acquire, 0x1A);
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ASSERT_REG_POSITION(semaphore_release, 0x1B);
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ASSERT_REG_POSITION(semaphore_release, 0x1B);
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ASSERT_REG_POSITION(fence_value, 0x1C);
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ASSERT_REG_POSITION(fence_action, 0x1D);
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ASSERT_REG_POSITION(acquire_mode, 0x100);
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ASSERT_REG_POSITION(acquire_mode, 0x100);
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ASSERT_REG_POSITION(acquire_source, 0x101);
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ASSERT_REG_POSITION(acquire_source, 0x101);
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@ -137,7 +137,6 @@ constexpr std::array<FormatTuple, VideoCore::Surface::MaxPixelFormat> tex_format
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const FormatTuple& GetFormatTuple(PixelFormat pixel_format, ComponentType component_type) {
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const FormatTuple& GetFormatTuple(PixelFormat pixel_format, ComponentType component_type) {
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ASSERT(static_cast<std::size_t>(pixel_format) < tex_format_tuples.size());
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ASSERT(static_cast<std::size_t>(pixel_format) < tex_format_tuples.size());
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const auto& format{tex_format_tuples[static_cast<std::size_t>(pixel_format)]};
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const auto& format{tex_format_tuples[static_cast<std::size_t>(pixel_format)]};
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ASSERT(component_type == format.component_type);
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return format;
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return format;
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}
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}
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@ -42,11 +42,14 @@ u32 ShaderIR::DecodeArithmetic(NodeBlock& bb, u32 pc) {
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case OpCode::Id::FMUL_R:
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case OpCode::Id::FMUL_R:
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case OpCode::Id::FMUL_IMM: {
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case OpCode::Id::FMUL_IMM: {
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// FMUL does not have 'abs' bits and only the second operand has a 'neg' bit.
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// FMUL does not have 'abs' bits and only the second operand has a 'neg' bit.
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UNIMPLEMENTED_IF_MSG(instr.fmul.tab5cb8_2 != 0, "FMUL tab5cb8_2({}) is not implemented",
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if (instr.fmul.tab5cb8_2 != 0) {
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LOG_WARNING(HW_GPU, "FMUL tab5cb8_2({}) is not implemented",
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instr.fmul.tab5cb8_2.Value());
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instr.fmul.tab5cb8_2.Value());
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UNIMPLEMENTED_IF_MSG(
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}
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instr.fmul.tab5c68_0 != 1, "FMUL tab5cb8_0({}) is not implemented",
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if (instr.fmul.tab5c68_0 != 1) {
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instr.fmul.tab5c68_0.Value()); // SMO typical sends 1 here which seems to be the default
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LOG_WARNING(HW_GPU, "FMUL tab5cb8_0({}) is not implemented",
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instr.fmul.tab5c68_0.Value());
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}
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op_b = GetOperandAbsNegFloat(op_b, false, instr.fmul.negate_b);
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op_b = GetOperandAbsNegFloat(op_b, false, instr.fmul.negate_b);
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@ -23,7 +23,9 @@ u32 ShaderIR::DecodeArithmeticHalfImmediate(NodeBlock& bb, u32 pc) {
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LOG_WARNING(HW_GPU, "{} FTZ not implemented", opcode->get().GetName());
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LOG_WARNING(HW_GPU, "{} FTZ not implemented", opcode->get().GetName());
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}
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}
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} else {
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} else {
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UNIMPLEMENTED_IF(instr.alu_half_imm.precision != Tegra::Shader::HalfPrecision::None);
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if (instr.alu_half_imm.precision != Tegra::Shader::HalfPrecision::None) {
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LOG_WARNING(HW_GPU, "{} FTZ not implemented", opcode->get().GetName());
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}
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}
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}
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Node op_a = UnpackHalfFloat(GetRegister(instr.gpr8), instr.alu_half_imm.type_a);
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Node op_a = UnpackHalfFloat(GetRegister(instr.gpr8), instr.alu_half_imm.type_a);
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@ -18,10 +18,12 @@ u32 ShaderIR::DecodeFfma(NodeBlock& bb, u32 pc) {
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const auto opcode = OpCode::Decode(instr);
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const auto opcode = OpCode::Decode(instr);
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UNIMPLEMENTED_IF_MSG(instr.ffma.cc != 0, "FFMA cc not implemented");
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UNIMPLEMENTED_IF_MSG(instr.ffma.cc != 0, "FFMA cc not implemented");
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UNIMPLEMENTED_IF_MSG(instr.ffma.tab5980_0 != 1, "FFMA tab5980_0({}) not implemented",
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if (instr.ffma.tab5980_0 != 1) {
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instr.ffma.tab5980_0.Value()); // Seems to be 1 by default based on SMO
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LOG_WARNING(HW_GPU, "FFMA tab5980_0({}) not implemented", instr.ffma.tab5980_0.Value());
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UNIMPLEMENTED_IF_MSG(instr.ffma.tab5980_1 != 0, "FFMA tab5980_1({}) not implemented",
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}
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instr.ffma.tab5980_1.Value());
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if (instr.ffma.tab5980_1 != 0) {
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LOG_WARNING(HW_GPU, "FFMA tab5980_1({}) not implemented", instr.ffma.tab5980_1.Value());
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}
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const Node op_a = GetRegister(instr.gpr8);
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const Node op_a = GetRegister(instr.gpr8);
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@ -18,7 +18,7 @@ u32 ShaderIR::DecodeHalfSetPredicate(NodeBlock& bb, u32 pc) {
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const Instruction instr = {program_code[pc]};
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const Instruction instr = {program_code[pc]};
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const auto opcode = OpCode::Decode(instr);
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const auto opcode = OpCode::Decode(instr);
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UNIMPLEMENTED_IF(instr.hsetp2.ftz != 0);
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DEBUG_ASSERT(instr.hsetp2.ftz == 0);
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Node op_a = UnpackHalfFloat(GetRegister(instr.gpr8), instr.hsetp2.type_a);
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Node op_a = UnpackHalfFloat(GetRegister(instr.gpr8), instr.hsetp2.type_a);
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op_a = GetOperandAbsNegHalf(op_a, instr.hsetp2.abs_a, instr.hsetp2.negate_a);
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op_a = GetOperandAbsNegHalf(op_a, instr.hsetp2.abs_a, instr.hsetp2.negate_a);
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@ -22,9 +22,9 @@ u32 ShaderIR::DecodeHfma2(NodeBlock& bb, u32 pc) {
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const auto opcode = OpCode::Decode(instr);
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const auto opcode = OpCode::Decode(instr);
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if (opcode->get().GetId() == OpCode::Id::HFMA2_RR) {
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if (opcode->get().GetId() == OpCode::Id::HFMA2_RR) {
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UNIMPLEMENTED_IF(instr.hfma2.rr.precision != HalfPrecision::None);
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DEBUG_ASSERT(instr.hfma2.rr.precision == HalfPrecision::None);
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} else {
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} else {
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UNIMPLEMENTED_IF(instr.hfma2.precision != HalfPrecision::None);
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DEBUG_ASSERT(instr.hfma2.precision == HalfPrecision::None);
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}
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}
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constexpr auto identity = HalfType::H0_H1;
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constexpr auto identity = HalfType::H0_H1;
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