mirror of
https://github.com/yuzu-mirror/yuzu.git
synced 2024-11-05 04:09:58 +00:00
glasm: Do not alias ConditionRef for now
Immediate condition refs where not handled correctly. Just move the value for now.
This commit is contained in:
parent
9bb3e008c9
commit
1ee7f8b943
2 changed files with 2 additions and 3 deletions
|
@ -22,8 +22,8 @@ void EmitIdentity(EmitContext&, IR::Inst& inst, const IR::Value& value) {
|
||||||
Alias(inst, value);
|
Alias(inst, value);
|
||||||
}
|
}
|
||||||
|
|
||||||
void EmitConditionRef(EmitContext&, IR::Inst& inst, const IR::Value& value) {
|
void EmitConditionRef(EmitContext& ctx, IR::Inst& inst, const IR::Value& value) {
|
||||||
Alias(inst, value);
|
ctx.Add("MOV.S {},{};", inst, ScalarS32{ctx.reg_alloc.Consume(value)});
|
||||||
}
|
}
|
||||||
|
|
||||||
void EmitBitCastU16F16(EmitContext&, IR::Inst& inst, const IR::Value& value) {
|
void EmitBitCastU16F16(EmitContext&, IR::Inst& inst, const IR::Value& value) {
|
||||||
|
|
|
@ -139,7 +139,6 @@ void RegAlloc::Free(Id id) {
|
||||||
/*static*/ bool RegAlloc::IsAliased(const IR::Inst& inst) {
|
/*static*/ bool RegAlloc::IsAliased(const IR::Inst& inst) {
|
||||||
switch (inst.GetOpcode()) {
|
switch (inst.GetOpcode()) {
|
||||||
case IR::Opcode::Identity:
|
case IR::Opcode::Identity:
|
||||||
case IR::Opcode::ConditionRef:
|
|
||||||
case IR::Opcode::BitCastU16F16:
|
case IR::Opcode::BitCastU16F16:
|
||||||
case IR::Opcode::BitCastU32F32:
|
case IR::Opcode::BitCastU32F32:
|
||||||
case IR::Opcode::BitCastU64F64:
|
case IR::Opcode::BitCastU64F64:
|
||||||
|
|
Loading…
Reference in a new issue