mirror of
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259 lines
6.2 KiB
Markdown
259 lines
6.2 KiB
Markdown
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# cpuid
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Package cpuid provides information about the CPU running the current program.
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CPU features are detected on startup, and kept for fast access through the life of the application.
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Currently x86 / x64 (AMD64/i386) and ARM (ARM64) is supported, and no external C (cgo) code is used, which should make the library very easy to use.
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You can access the CPU information by accessing the shared CPU variable of the cpuid library.
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Package home: https://github.com/klauspost/cpuid
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[![PkgGoDev](https://pkg.go.dev/badge/github.com/klauspost/cpuid)](https://pkg.go.dev/github.com/klauspost/cpuid/v2)
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[![Build Status][3]][4]
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[3]: https://travis-ci.org/klauspost/cpuid.svg?branch=master
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[4]: https://travis-ci.org/klauspost/cpuid
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## installing
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`go get -u github.com/klauspost/cpuid/v2` using modules.
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Drop `v2` for others.
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## example
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```Go
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package main
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import (
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"fmt"
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"strings"
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. "github.com/klauspost/cpuid/v2"
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)
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func main() {
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// Print basic CPU information:
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fmt.Println("Name:", CPU.BrandName)
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fmt.Println("PhysicalCores:", CPU.PhysicalCores)
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fmt.Println("ThreadsPerCore:", CPU.ThreadsPerCore)
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fmt.Println("LogicalCores:", CPU.LogicalCores)
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fmt.Println("Family", CPU.Family, "Model:", CPU.Model, "Vendor ID:", CPU.VendorID)
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fmt.Println("Features:", strings.Join(CPU.FeatureSet(), ","))
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fmt.Println("Cacheline bytes:", CPU.CacheLine)
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fmt.Println("L1 Data Cache:", CPU.Cache.L1D, "bytes")
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fmt.Println("L1 Instruction Cache:", CPU.Cache.L1I, "bytes")
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fmt.Println("L2 Cache:", CPU.Cache.L2, "bytes")
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fmt.Println("L3 Cache:", CPU.Cache.L3, "bytes")
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fmt.Println("Frequency", CPU.Hz, "hz")
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// Test if we have these specific features:
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if CPU.Supports(SSE, SSE2) {
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fmt.Println("We have Streaming SIMD 2 Extensions")
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}
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}
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```
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Sample output:
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```
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>go run main.go
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Name: AMD Ryzen 9 3950X 16-Core Processor
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PhysicalCores: 16
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ThreadsPerCore: 2
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LogicalCores: 32
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Family 23 Model: 113 Vendor ID: AMD
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Features: ADX,AESNI,AVX,AVX2,BMI1,BMI2,CLMUL,CMOV,CX16,F16C,FMA3,HTT,HYPERVISOR,LZCNT,MMX,MMXEXT,NX,POPCNT,RDRAND,RDSEED,RDTSCP,SHA,SSE,SSE2,SSE3,SSE4,SSE42,SSE4A,SSSE3
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Cacheline bytes: 64
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L1 Data Cache: 32768 bytes
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L1 Instruction Cache: 32768 bytes
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L2 Cache: 524288 bytes
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L3 Cache: 16777216 bytes
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Frequency 0 hz
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We have Streaming SIMD 2 Extensions
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```
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# usage
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The `cpuid.CPU` provides access to CPU features. Use `cpuid.CPU.Supports()` to check for CPU features.
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A faster `cpuid.CPU.Has()` is provided which will usually be inlined by the gc compiler.
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Note that for some cpu/os combinations some features will not be detected.
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`amd64` has rather good support and should work reliably on all platforms.
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Note that hypervisors may not pass through all CPU features.
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## arm64 feature detection
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Not all operating systems provide ARM features directly
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and there is no safe way to do so for the rest.
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Currently `arm64/linux` and `arm64/freebsd` should be quite reliable.
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`arm64/darwin` adds features expected from the M1 processor, but a lot remains undetected.
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A `DetectARM()` can be used if you are able to control your deployment,
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it will detect CPU features, but may crash if the OS doesn't intercept the calls.
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A `-cpu.arm` flag for detecting unsafe ARM features can be added. See below.
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Note that currently only features are detected on ARM,
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no additional information is currently available.
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## flags
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It is possible to add flags that affects cpu detection.
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For this the `Flags()` command is provided.
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This must be called *before* `flag.Parse()` AND after the flags have been parsed `Detect()` must be called.
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This means that any detection used in `init()` functions will not contain these flags.
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Example:
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```Go
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package main
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import (
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"flag"
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"fmt"
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"strings"
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"github.com/klauspost/cpuid/v2"
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)
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func main() {
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cpuid.Flags()
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flag.Parse()
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cpuid.Detect()
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// Test if we have these specific features:
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if cpuid.CPU.Supports(cpuid.SSE, cpuid.SSE2) {
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fmt.Println("We have Streaming SIMD 2 Extensions")
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}
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}
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```
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## commandline
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Download as binary from: https://github.com/klauspost/cpuid/releases
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Install from source:
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`go install github.com/klauspost/cpuid/v2/cmd/cpuid@latest`
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### Example
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```
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λ cpuid
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Name: AMD Ryzen 9 3950X 16-Core Processor
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Vendor String: AuthenticAMD
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Vendor ID: AMD
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PhysicalCores: 16
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Threads Per Core: 2
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Logical Cores: 32
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CPU Family 23 Model: 113
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Features: ADX,AESNI,AVX,AVX2,BMI1,BMI2,CLMUL,CLZERO,CMOV,CMPXCHG8,CPBOOST,CX16,F16C,FMA3,FXSR,FXSROPT,HTT,HYPERVISOR,LAHF,LZCNT,MCAOVERFLOW,MMX,MMXEXT,MOVBE,NX,OSXSAVE,POPCNT,RDRAND,RDSEED,RDTSCP,SCE,SHA,SSE,SSE2,SSE3,SSE4,SSE42,SSE4A,SSSE3,SUCCOR,X87,XSAVE
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Microarchitecture level: 3
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Cacheline bytes: 64
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L1 Instruction Cache: 32768 bytes
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L1 Data Cache: 32768 bytes
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L2 Cache: 524288 bytes
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L3 Cache: 16777216 bytes
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```
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### JSON Output:
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```
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λ cpuid --json
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{
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"BrandName": "AMD Ryzen 9 3950X 16-Core Processor",
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"VendorID": 2,
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"VendorString": "AuthenticAMD",
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"PhysicalCores": 16,
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"ThreadsPerCore": 2,
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"LogicalCores": 32,
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"Family": 23,
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"Model": 113,
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"CacheLine": 64,
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"Hz": 0,
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"BoostFreq": 0,
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"Cache": {
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"L1I": 32768,
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"L1D": 32768,
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"L2": 524288,
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"L3": 16777216
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},
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"SGX": {
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"Available": false,
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"LaunchControl": false,
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"SGX1Supported": false,
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"SGX2Supported": false,
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"MaxEnclaveSizeNot64": 0,
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"MaxEnclaveSize64": 0,
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"EPCSections": null
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},
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"Features": [
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"ADX",
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"AESNI",
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"AVX",
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"AVX2",
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"BMI1",
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"BMI2",
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"CLMUL",
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"CLZERO",
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"CMOV",
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"CMPXCHG8",
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"CPBOOST",
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"CX16",
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"F16C",
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"FMA3",
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"FXSR",
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"FXSROPT",
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"HTT",
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"HYPERVISOR",
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"LAHF",
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"LZCNT",
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"MCAOVERFLOW",
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"MMX",
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"MMXEXT",
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"MOVBE",
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"NX",
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"OSXSAVE",
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"POPCNT",
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"RDRAND",
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"RDSEED",
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"RDTSCP",
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"SCE",
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"SHA",
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"SSE",
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"SSE2",
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"SSE3",
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"SSE4",
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"SSE42",
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"SSE4A",
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"SSSE3",
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"SUCCOR",
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"X87",
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"XSAVE"
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],
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"X64Level": 3
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}
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```
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### Check CPU microarch level
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```
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λ cpuid --check-level=3
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2022/03/18 17:04:40 AMD Ryzen 9 3950X 16-Core Processor
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2022/03/18 17:04:40 Microarchitecture level 3 is supported. Max level is 3.
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Exit Code 0
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λ cpuid --check-level=4
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2022/03/18 17:06:18 AMD Ryzen 9 3950X 16-Core Processor
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2022/03/18 17:06:18 Microarchitecture level 4 not supported. Max level is 3.
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Exit Code 1
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```
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# license
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This code is published under an MIT license. See LICENSE file for more information.
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