Ryujinx/ARMeilleure/Instructions
mageven 9bda7b4699
Implement VCNT instruction (#1963)
* Implement VCNT based on AArch64 CNT

Add tests

* Update PTC version

* Address LDj's comments

* Explicit size in encoding
* Tighter tests
* Replace SoftFallback with IR helper

Co-authored-by: LDj3SNuD <35856442+LDj3SNuD@users.noreply.github.com>

* Reduce one BitwiseAnd from IR fallback

Based on popcount64b from https://en.wikipedia.org/wiki/Hamming_weight#Efficient_implementation

* Rename parameter and add assert

Co-authored-by: LDj3SNuD <35856442+LDj3SNuD@users.noreply.github.com>

Co-authored-by: LDj3SNuD <35856442+LDj3SNuD@users.noreply.github.com>
2021-02-22 16:26:13 +01:00
..
CryptoHelper.cs
InstEmitAlu.cs
InstEmitAlu32.cs Fix Vnmls_S fast path (F64: losing input d value). Fix Vnmla_S & Vnmls_S slow paths (using fused inst.s). Fix Vfma_V slow path not using StandardFPSCRValue(). (#1775) 2020-12-17 20:43:41 +01:00
InstEmitAluHelper.cs Clear JIT cache on exit (#1518) 2020-12-16 17:07:42 -03:00
InstEmitBfm.cs
InstEmitCcmp.cs
InstEmitCsel.cs
InstEmitDiv.cs
InstEmitException.cs
InstEmitException32.cs
InstEmitFlow.cs
InstEmitFlow32.cs
InstEmitFlowHelper.cs
InstEmitHash.cs
InstEmitHash32.cs
InstEmitHashHelper.cs
InstEmitHelper.cs
InstEmitMemory.cs
InstEmitMemory32.cs
InstEmitMemoryEx.cs Implement PRFM (register variant) as NOP (#1956) 2021-01-26 16:09:27 +11:00
InstEmitMemoryEx32.cs
InstEmitMemoryExHelper.cs Validate CPU virtual addresses on access (#1987) 2021-02-16 19:04:19 +01:00
InstEmitMemoryHelper.cs Fix memory tracking performance regression (#2026) 2021-02-17 09:16:20 +11:00
InstEmitMove.cs
InstEmitMul.cs
InstEmitMul32.cs Fix Vnmls_S fast path (F64: losing input d value). Fix Vnmla_S & Vnmls_S slow paths (using fused inst.s). Fix Vfma_V slow path not using StandardFPSCRValue(). (#1775) 2020-12-17 20:43:41 +01:00
InstEmitSimdArithmetic.cs Implement VCNT instruction (#1963) 2021-02-22 16:26:13 +01:00
InstEmitSimdArithmetic32.cs Implement VCNT instruction (#1963) 2021-02-22 16:26:13 +01:00
InstEmitSimdCmp.cs
InstEmitSimdCmp32.cs
InstEmitSimdCrypto.cs
InstEmitSimdCrypto32.cs
InstEmitSimdCvt.cs
InstEmitSimdCvt32.cs
InstEmitSimdHash.cs
InstEmitSimdHelper.cs Implement VCNT instruction (#1963) 2021-02-22 16:26:13 +01:00
InstEmitSimdHelper32.cs CPU (A64): Add Pmull_V Inst. with Clmul fast path for the "1/2D -> 1Q" variant & Sse fast path and slow path for both the "8/16B -> 8H" and "1/2D -> 1Q" variants; with Test. (#1817) 2021-01-04 23:45:54 +01:00
InstEmitSimdLogical.cs
InstEmitSimdLogical32.cs
InstEmitSimdMemory.cs
InstEmitSimdMemory32.cs Add most of the A32 instruction set to ARMeilleure (#897) 2020-02-24 08:20:40 +11:00
InstEmitSimdMove.cs
InstEmitSimdMove32.cs
InstEmitSimdShift.cs
InstEmitSimdShift32.cs
InstEmitSystem.cs
InstEmitSystem32.cs
InstName.cs Implement VCNT instruction (#1963) 2021-02-22 16:26:13 +01:00
NativeInterface.cs PPTC Follow-up. (#1712) 2020-12-17 20:32:09 +01:00
SoftFallback.cs Implement VCNT instruction (#1963) 2021-02-22 16:26:13 +01:00
SoftFloat.cs