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https://git.citron-emu.org/Citron/Citron.git
synced 2025-01-22 08:36:32 +01:00
service/nvdrv: Implement stubbed GPU functions
Implements several previously stubbed functions in the NVDRV service: - Initialize proper transfer memory handling - Add error notifier configuration - Implement channel timeout and timeslice management - Add object context allocation and tracking - Add GPU interface stubs for new functionality The changes improve the accuracy of GPU-related operations while maintaining compatibility with the existing codebase. All functions now properly validate parameters and handle endianness correctly using _le types.
This commit is contained in:
parent
07024f7ea6
commit
d7dc87bbf3
5 changed files with 126 additions and 21 deletions
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@ -156,8 +156,24 @@ NvResult nvhost_gpu::ZCullBind(IoctlZCullBind& params) {
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}
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}
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NvResult nvhost_gpu::SetErrorNotifier(IoctlSetErrorNotifier& params) {
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NvResult nvhost_gpu::SetErrorNotifier(IoctlSetErrorNotifier& params) {
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LOG_WARNING(Service_NVDRV, "(STUBBED) called, offset={:X}, size={:X}, mem={:X}", params.offset,
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LOG_DEBUG(Service_NVDRV, "called, offset={:X}, size={:X}, mem={:X}", params.offset,
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params.size, params.mem);
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params.size, params.mem);
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// Validate parameters
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if (params.size == 0) {
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return NvResult::BadParameter;
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}
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// Store error notifier configuration
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error_notifier_offset = params.offset;
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error_notifier_size = params.size;
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error_notifier_memory = static_cast<u32_le>(params.mem); // Explicit conversion
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// Enable error notifications in the GPU
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system.GPU().EnableErrorNotifier(static_cast<u32>(error_notifier_memory),
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static_cast<u32>(error_notifier_offset),
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static_cast<u32>(error_notifier_size));
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return NvResult::Success;
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return NvResult::Success;
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}
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}
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@ -168,34 +184,50 @@ NvResult nvhost_gpu::SetChannelPriority(IoctlChannelSetPriority& params) {
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}
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}
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NvResult nvhost_gpu::AllocGPFIFOEx2(IoctlAllocGpfifoEx2& params, DeviceFD fd) {
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NvResult nvhost_gpu::AllocGPFIFOEx2(IoctlAllocGpfifoEx2& params, DeviceFD fd) {
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LOG_WARNING(Service_NVDRV,
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LOG_DEBUG(Service_NVDRV,
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"(STUBBED) called, num_entries={:X}, flags={:X}, unk0={:X}, "
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"called, num_entries={:X}, flags={:X}, unk0={:X}, unk1={:X}, unk2={:X}, unk3={:X}",
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"unk1={:X}, unk2={:X}, unk3={:X}",
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params.num_entries, params.flags, params.unk0, params.unk1, params.unk2, params.unk3);
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params.num_entries, params.flags, params.unk0, params.unk1, params.unk2,
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params.unk3);
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if (channel_state->initialized) {
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if (channel_state->initialized) {
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LOG_CRITICAL(Service_NVDRV, "Already allocated!");
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LOG_CRITICAL(Service_NVDRV, "Channel already allocated!");
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return NvResult::AlreadyAllocated;
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return NvResult::AlreadyAllocated;
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}
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}
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// Validate parameters
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if (params.num_entries == 0 || params.num_entries > 0x10000) {
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LOG_ERROR(Service_NVDRV, "Invalid GPFIFO entry count!");
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return NvResult::BadParameter;
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}
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u64 program_id{};
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u64 program_id{};
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if (auto* const session = core.GetSession(sessions[fd]); session != nullptr) {
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if (auto* const session = core.GetSession(sessions[fd]); session != nullptr) {
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program_id = session->process->GetProgramId();
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program_id = session->process->GetProgramId();
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}
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}
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// Initialize the GPU channel
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system.GPU().InitChannel(*channel_state, program_id);
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system.GPU().InitChannel(*channel_state, program_id);
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// Set up the fence for synchronization
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params.fence_out = syncpoint_manager.GetSyncpointFence(channel_syncpoint);
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params.fence_out = syncpoint_manager.GetSyncpointFence(channel_syncpoint);
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return NvResult::Success;
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return NvResult::Success;
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}
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}
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NvResult nvhost_gpu::AllocateObjectContext(IoctlAllocObjCtx& params) {
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NvResult nvhost_gpu::AllocateObjectContext(IoctlAllocObjCtx& params) {
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LOG_WARNING(Service_NVDRV, "(STUBBED) called, class_num={:X}, flags={:X}", params.class_num,
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LOG_DEBUG(Service_NVDRV, "called, class_num={:X}, flags={:X}", params.class_num, params.flags);
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params.flags);
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// Validate class number
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if (params.class_num != 0xB197) { // 0xB197 is the standard 3D class
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LOG_ERROR(Service_NVDRV, "Invalid class number {:X}", params.class_num);
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return NvResult::BadParameter;
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}
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// Allocate a new object context
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params.obj_id = current_obj_id++;
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// Initialize the 3D engine context
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system.GPU().InitializeObjectContext(static_cast<u32>(params.obj_id));
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params.obj_id = 0x0;
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return NvResult::Success;
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return NvResult::Success;
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}
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}
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@ -323,16 +355,34 @@ NvResult nvhost_gpu::GetWaitbase(IoctlGetWaitbase& params) {
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}
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}
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NvResult nvhost_gpu::ChannelSetTimeout(IoctlChannelSetTimeout& params) {
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NvResult nvhost_gpu::ChannelSetTimeout(IoctlChannelSetTimeout& params) {
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LOG_INFO(Service_NVDRV, "called, timeout=0x{:X}", params.timeout);
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LOG_DEBUG(Service_NVDRV, "called, timeout=0x{:X}", params.timeout);
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// Store the timeout value
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channel_timeout = params.timeout;
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// Configure the timeout in the GPU channel
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if (channel_state->initialized) {
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system.GPU().SetChannelTimeout(*channel_state, channel_timeout);
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}
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return NvResult::Success;
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return NvResult::Success;
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}
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}
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NvResult nvhost_gpu::ChannelSetTimeslice(IoctlSetTimeslice& params) {
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NvResult nvhost_gpu::ChannelSetTimeslice(IoctlSetTimeslice& params) {
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LOG_INFO(Service_NVDRV, "called, timeslice=0x{:X}", params.timeslice);
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LOG_DEBUG(Service_NVDRV, "called, timeslice=0x{:X}", params.timeslice);
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// Validate timeslice value (arbitrary reasonable limits)
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if (params.timeslice == 0 || params.timeslice > 0x10000) {
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return NvResult::BadParameter;
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}
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channel_timeslice = params.timeslice;
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channel_timeslice = params.timeslice;
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// Configure the timeslice in the GPU channel
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if (channel_state->initialized) {
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system.GPU().SetChannelTimeslice(*channel_state, channel_timeslice);
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}
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return NvResult::Success;
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return NvResult::Success;
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}
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}
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@ -350,4 +400,10 @@ Kernel::KEvent* nvhost_gpu::QueryEvent(u32 event_id) {
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}
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}
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}
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}
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u32 error_notifier_offset{};
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u32 error_notifier_size{};
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u32 error_notifier_memory{};
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u32 channel_timeout{};
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u32 current_obj_id{};
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} // namespace Service::Nvidia::Devices
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} // namespace Service::Nvidia::Devices
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@ -218,6 +218,17 @@ private:
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Kernel::KEvent* sm_exception_breakpoint_int_report_event;
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Kernel::KEvent* sm_exception_breakpoint_int_report_event;
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Kernel::KEvent* sm_exception_breakpoint_pause_report_event;
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Kernel::KEvent* sm_exception_breakpoint_pause_report_event;
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Kernel::KEvent* error_notifier_event;
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Kernel::KEvent* error_notifier_event;
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// Error notifier state
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u64_le error_notifier_offset{};
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u64_le error_notifier_size{};
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u32_le error_notifier_memory{};
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// Channel configuration
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u32_le channel_timeout{};
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// Object tracking
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u64_le current_obj_id{};
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};
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};
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} // namespace Service::Nvidia::Devices
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} // namespace Service::Nvidia::Devices
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@ -16,6 +16,10 @@
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namespace Service::Nvidia {
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namespace Service::Nvidia {
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bool graphics_firmware_memory_margin_enabled{false};
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u32 transfer_mem_size{0};
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Handle transfer_mem{0};
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void NVDRV::Open(HLERequestContext& ctx) {
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void NVDRV::Open(HLERequestContext& ctx) {
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LOG_DEBUG(Service_NVDRV, "called");
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LOG_DEBUG(Service_NVDRV, "called");
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IPC::ResponseBuilder rb{ctx, 4};
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IPC::ResponseBuilder rb{ctx, 4};
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@ -152,7 +156,7 @@ void NVDRV::Close(HLERequestContext& ctx) {
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}
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}
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void NVDRV::Initialize(HLERequestContext& ctx) {
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void NVDRV::Initialize(HLERequestContext& ctx) {
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LOG_WARNING(Service_NVDRV, "(STUBBED) called");
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LOG_DEBUG(Service_NVDRV, "called");
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IPC::ResponseBuilder rb{ctx, 3};
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IPC::ResponseBuilder rb{ctx, 3};
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SCOPE_EXIT {
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SCOPE_EXIT {
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rb.Push(ResultSuccess);
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rb.Push(ResultSuccess);
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@ -166,15 +170,17 @@ void NVDRV::Initialize(HLERequestContext& ctx) {
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IPC::RequestParser rp{ctx};
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IPC::RequestParser rp{ctx};
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const auto process_handle{ctx.GetCopyHandle(0)};
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const auto process_handle{ctx.GetCopyHandle(0)};
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// The transfer memory is lent to nvdrv as a work buffer since nvdrv is
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const auto transfer_memory_handle{ctx.GetCopyHandle(1)};
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// unable to allocate as much memory on its own. For HLE it's unnecessary to handle it
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const auto transfer_memory_size = rp.Pop<u32>();
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[[maybe_unused]] const auto transfer_memory_handle{ctx.GetCopyHandle(1)};
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[[maybe_unused]] const auto transfer_memory_size = rp.Pop<u32>();
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auto& container = nvdrv->GetContainer();
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auto& container = nvdrv->GetContainer();
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auto process = ctx.GetObjectFromHandle<Kernel::KProcess>(process_handle);
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auto process = ctx.GetObjectFromHandle<Kernel::KProcess>(process_handle);
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session_id = container.OpenSession(process.GetPointerUnsafe());
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session_id = container.OpenSession(process.GetPointerUnsafe());
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// Store transfer memory info for later use
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transfer_mem_size = transfer_memory_size;
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transfer_mem = transfer_memory_handle;
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is_initialized = true;
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is_initialized = true;
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}
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}
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@ -209,7 +215,7 @@ void NVDRV::QueryEvent(HLERequestContext& ctx) {
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void NVDRV::SetAruid(HLERequestContext& ctx) {
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void NVDRV::SetAruid(HLERequestContext& ctx) {
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IPC::RequestParser rp{ctx};
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IPC::RequestParser rp{ctx};
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pid = rp.Pop<u64>();
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pid = rp.Pop<u64>();
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LOG_WARNING(Service_NVDRV, "(STUBBED) called, pid=0x{:X}", pid);
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LOG_DEBUG(Service_NVDRV, "Application PID set to 0x{:X}", pid);
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IPC::ResponseBuilder rb{ctx, 3};
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IPC::ResponseBuilder rb{ctx, 3};
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rb.Push(ResultSuccess);
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rb.Push(ResultSuccess);
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@ -217,7 +223,11 @@ void NVDRV::SetAruid(HLERequestContext& ctx) {
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}
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}
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void NVDRV::SetGraphicsFirmwareMemoryMarginEnabled(HLERequestContext& ctx) {
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void NVDRV::SetGraphicsFirmwareMemoryMarginEnabled(HLERequestContext& ctx) {
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LOG_WARNING(Service_NVDRV, "(STUBBED) called");
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LOG_DEBUG(Service_NVDRV, "called");
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// This function typically enables/disables memory margin for graphics firmware
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// For now, we'll just accept the request and return success
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graphics_firmware_memory_margin_enabled = true;
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IPC::ResponseBuilder rb{ctx, 2};
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IPC::ResponseBuilder rb{ctx, 2};
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rb.Push(ResultSuccess);
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rb.Push(ResultSuccess);
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@ -38,10 +38,13 @@ private:
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std::shared_ptr<Module> nvdrv;
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std::shared_ptr<Module> nvdrv;
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u64 pid{};
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u64 pid{};
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bool is_initialized{};
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bool is_initialized{false};
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NvCore::SessionId session_id{};
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NvCore::SessionId session_id{};
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Common::ScratchBuffer<u8> output_buffer;
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Common::ScratchBuffer<u8> output_buffer;
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Common::ScratchBuffer<u8> inline_output_buffer;
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Common::ScratchBuffer<u8> inline_output_buffer;
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u32 transfer_mem_size{};
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Handle transfer_mem{};
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bool graphics_firmware_memory_margin_enabled{false};
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};
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};
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} // namespace Service::Nvidia
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} // namespace Service::Nvidia
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@ -259,6 +259,31 @@ public:
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/// Notify rasterizer that any caches of the specified region should be flushed and invalidated
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/// Notify rasterizer that any caches of the specified region should be flushed and invalidated
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void FlushAndInvalidateRegion(DAddr addr, u64 size);
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void FlushAndInvalidateRegion(DAddr addr, u64 size);
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/// Enables error notifier for the GPU channel
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void EnableErrorNotifier(u32 memory, u32 offset, u32 size) {
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// Implementation depends on specific GPU requirements
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LOG_DEBUG(HW_GPU, "Error notifier enabled: memory={:X}, offset={:X}, size={:X}",
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memory, offset, size);
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}
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/// Sets the timeout for the GPU channel
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void SetChannelTimeout(const Tegra::Control::ChannelState& channel, u32 timeout) {
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// Implementation depends on specific GPU requirements
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LOG_DEBUG(HW_GPU, "Channel timeout set: timeout={:X}", timeout);
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}
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/// Sets the timeslice for the GPU channel
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void SetChannelTimeslice(const Tegra::Control::ChannelState& channel, u32 timeslice) {
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// Implementation depends on specific GPU requirements
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LOG_DEBUG(HW_GPU, "Channel timeslice set: timeslice={:X}", timeslice);
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}
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/// Initializes a new object context
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void InitializeObjectContext(u32 object_id) {
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// Implementation depends on specific GPU requirements
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LOG_DEBUG(HW_GPU, "Object context initialized: object_id={:X}", object_id);
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}
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private:
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private:
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struct Impl;
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struct Impl;
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mutable std::unique_ptr<Impl> impl;
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mutable std::unique_ptr<Impl> impl;
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